AT32UC3B0512-A2UES ATMEL [ATMEL Corporation], AT32UC3B0512-A2UES Datasheet - Page 21

• Manufacturer Part Number: AT32UC3B0512-A2UES
• Description: 32-bit AVR Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

6.3.6
6.3.7
Unimplemented Instructions
CPU and Architecture Revision
The following table shows the instructions with support for unaligned addresses. All other
instructions require aligned addresses.
Table 6-1.
The following instructions are unimplemented in AVR32UC, and will cause an Unimplemented
Instruction Exception if executed:
• All SIMD instructions
• All coprocessor instructions if no coprocessors are present
• retj, incjosp, popjc, pushjc
• tlbr, tlbs, tlbw
• cache
Three major revisions of the AVR32UC CPU currently exist.
The Architecture Revision field in the CONFIG0 system register identifies which architecture
revision is implemented in a specific device.
AVR32UC CPU revision 3 is fully backward-compatible with revisions 1 and 2, ie. code compiled
for revision 1 or 2 is binary-compatible with revision 3 CPUs.
Instruction
ld.d
st.d
Instructions with Unaligned Reference Support
Supported alignment
Word
Word