DSPIC30F2010 MICROCHIP [Microchip Technology], DSPIC30F2010 Datasheet - Page 56

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DSPIC30F2010

Manufacturer Part Number
DSPIC30F2010
Description
High-Performance, 16-Bit Digital Signal Controllers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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dsPIC30F2010
8.2
The use of the ADPCFG and TRIS registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their correspond-
ing TRIS bit set (input). If the TRIS bit is cleared (out-
put), the digital output level (V
converted.
When reading the PORT register, all pins configured as
analog input channel will read as cleared (a low level).
Pins configured as digital inputs will not convert an ana-
log input. Analog levels on any pin that is defined as a
digital input (including the ANx pins), may cause the
input buffer to consume current that exceeds the
device specifications.
8.2.1
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically this instruction
would be a NOP.
EXAMPLE 8-1:
DS70118G-page 54
MOV 0xFF00, W0; Configure PORTB<15:8>
MOV W0, TRISBB; and PORTB<7:0> as outputs
NOP
btssPORTB, #13; Next Instruction
; as inputs
; Delay 1 cycle
Configuring Analog Port Pins
I/O PORT WRITE/READ TIMING
PORT WRITE/READ
EXAMPLE
OH
or V
OL
) will be
8.3
The Input Change Notification module provides the
dsPIC30F devices the ability to generate interrupt
requests to the processor in response to a change-of-
state on selected input pins. This module is capable of
detecting input change-of-states even in Sleep mode,
when the clocks are disabled. There are up to 22 exter-
nal signals (CN0 through CN21) that may be selected
(enabled) for generating an interrupt request on a
change-of-state.
Input Change Notification Module
© 2006 Microchip Technology Inc.

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