DSPIC30F2010 MICROCHIP [Microchip Technology], DSPIC30F2010 Datasheet - Page 117

• Manufacturer Part Number: DSPIC30F2010
• Description: High-Performance, 16-Bit Digital Signal Controllers
• Manufacturer: MICROCHIP [Microchip Technology]

The configuration guidelines give the required setup
values for the conversion speeds above 500 ksps,
since they require external V
are some differences in the configuration procedure.
Configuration details that are not critical to the
conversion speed have been omitted.
FIGURE 18-2:
18.7.1
The configuration for 1 Msps operation is dependent on
whether a single input pin is to be sampled or whether
multiple pins will be sampled.
18.7.1.1
For conversions at 1 Msps for a single analog input, at
least two sample and hold channels must be enabled.
The analog input multiplexer must be configured so
that the same input pin is connected to both sample
and hold channels. The A/D converts the value held on
one S/H channel, while the second S/H channel
acquires a new input sample.
18.7.1.2
The A/D converter can also be used to sample multiple
analog inputs using multiple sample and hold channels.
In this case, the total 1 Msps conversion rate is divided
among the different input signals. For example, four
inputs can be sampled at a rate of 250 ksps for each
signal or two inputs could be sampled at a rate of
500 ksps for each signal. Sequential sampling must be
used in this configuration to allow adequate sampling
time on each input.
18.7.1.3
The following configuration items are required to
achieve a 1 Msps conversion rate.
• Comply with conditions provided in Table 19-2
© 2006 Microchip Technology Inc.
1 Msps CONFIGURATION
GUIDELINE
Single Analog Input
Multiple Analog Inputs
1 Msps Configuration Items
ADC VOLTAGE REFERENCE SCHEMATIC
C2
0.1 F
REF
R2
10
V
pins usage and there
DD
C1
0.01 F
V
SS
V
10
R1
DD
dsPIC30F2010
V
DD
Figure 18-2 depicts the recommended circuit for the
conversion rates above 500 ksps.
• Connect external V
• Set SSRC<2:0> = 111 in the ADCON1 register to
• Enable automatic sampling by setting the ASAM
• Enable sequential sampling by clearing the
• Enable at least two sample and hold channels by
• Write the SMPI<3:0> control bits in the ADCON2
• Configure the A/D clock period to be:
• Configure the sampling time to be 2 T
• Select at least two channels per analog input pin
V
V
DD
SS
the recommended circuit shown in Figure 18-2
enable the auto-convert option
control bit in the ADCON1 register
SIMSAM bit in the ADCON1 register
writing the CHPS<1:0> control bits in the
ADCON2 register
register for the desired number of conversions
between interrupts. At a minimum, set
SMPI<3:0> = 0001 since at least two sample and
hold channels should be enabled
by writing to the ADCS<5:0> control bits in the
ADCON3 register
writing: SAMC<4:0> = 00010
by writing to the ADCHS register
V
DD
12 x 1,000,000
C8
1 F
C5
1 F
dsPIC30F2010
V
V
DD
DD
1
REF
+ and V
REF
= 83.33 ns
DS70118G-page 115
- pins following
AD
by