DSPIC30F2010 MICROCHIP [Microchip Technology], DSPIC30F2010 Datasheet - Page 118

• Manufacturer Part Number: DSPIC30F2010
• Description: High-Performance, 16-Bit Digital Signal Controllers
• Manufacturer: MICROCHIP [Microchip Technology]

dsPIC30F2010
18.7.2
The following configuration items are required to
achieve a 750 ksps conversion rate. This configuration
assumes that a single analog input is to be sampled.
• Comply with conditions provided in Table 18-2
• Connect external V
• Set SSRC<2:0> = 111 in the ADCON1 register to
• Enable automatic sampling by setting the ASAM
• Enable one sample and hold channel by setting
• Write the SMPI<3:0> control bits in the ADCON2
• Configure the A/D clock period to be:
• Configure the sampling time to be 2 T
18.7.3
The configuration for 600 ksps operation is dependent
on whether a single input pin is to be sampled or
whether multiple pins will be sampled.
18.7.3.1
When performing conversions at 600 ksps for a single
analog input, at least two sample and hold channels
must be enabled. The analog input multiplexer must be
configured so that the same input pin is connected to
both sample and hold channels. The A/D converts the
value held on one S/H channel, while the second S/H
channel acquires a new input sample.
DS70118G-page 116
the recommended circuit shown in Figure 18-2
enable the auto-convert option
control bit in the ADCON1 register
CHPS<1:0> = 00 in the ADCON2 register
register for the desired number of conversions
between interrupts
by writing to the ADCS<5:0> control bits in the
ADCON3 register
writing: SAMC<4:0> = 00010
(12 + 2) X 750,000
750 ksps CONFIGURATION
GUIDELINE
600 ksps CONFIGURATION
GUIDELINE
Single Analog Input
1
REF
+ and V
REF
= 95.24 ns
- pins following
AD
by
18.7.3.2
The ADC can also be used to sample multiple analog
inputs using multiple sample and hold channels. In this
case, the total 600 ksps conversion rate is divided
among the different input signals. For example, four
inputs can be sampled at a rate of 150 ksps for each
signal or two inputs can be sampled at a rate of 300
ksps for each signal. Sequential sampling must be
used in this configuration to allow adequate sampling
time on each input.
18.7.3.3
The following configuration items are required to
achieve a 600 ksps conversion rate.
• Comply with conditions provided in Table 18-2
• Connect external V
• Set SSRC<2:0> = 111 in the ADCON1 register to
• Enable automatic sampling by setting the ASAM
• Enable sequential sampling by clearing the
• Enable at least two sample and hold channels by
• Write the SMPI<3:0> control bits in the ADCON2
• Configure the A/D clock period to be:
• Configure the sampling time to be 2 T
Select at least two channels per analog input pin by
writing to the ADCHS register.
the recommended circuit shown in Figure 18-2
enable the auto-convert option
control bit in the ADCON1 register
SIMSAM bit in the ADCON1 register
writing the CHPS<1:0> control bits in the
ADCON2 register
register for the desired number of conversions
between interrupts. At a minimum, set
SMPI<3:0> = 0001 since at least two sample and
hold channels should be enabled
by writing to the ADCS<5:0> control bits in the
ADCON3 register
writing: SAMC<4:0> = 00010
12 x 600,000
Multiple Analog Input
600 ksps Configuration Items
1
REF
© 2006 Microchip Technology Inc.
+ and V
REF
= 138.89 ns
- pins following
AD
by