KS8893ML MICREL [Micrel Semiconductor], KS8893ML Datasheet - Page 32

• Manufacturer Part Number: KS8893ML
• Description: Integrated 3-Port 10/100 Managed Switch with PHYs Preliminary Data Sheet Rev. 1.0
• Manufacturer: MICREL [Micrel Semiconductor]

reactivated again until switch resources free up. If a collision occurs, the binary exponential back-off algorithm is
skipped and carrier sense is generated immediately, thus reducing the chance of further collisions and carrier
sense is maintained to prevent packet reception.
To ensure no packet loss in 10 BASE-T or 100 BASE-TX half duplex modes, the user must enable the following:
1. Aggressive back-off (register 3 (0x03), bit [0])
2. No excessive collision drop (register 4 (0x04), bit [3])
Note: These bits are not set as defaults as this is not the IEEE standard.
Broadcast Storm Protection
The KS8893M has an intelligent option to protect the switch system from receiving too many broadcast packets.
As the broadcast packets are forwarded to all ports except the source port, an excessive number of switch
resources (bandwidth and available space in transmit queues) may be utilized. The KS8893M has the option to
include “multicast packets” for storm control. The broadcast storm rate parameters are programmed globally, and
can be enabled or disabled on a per port basis. The rate is based on a 67ms interval for 100BT and a 500ms
interval for 10BT. At the beginning of each interval, the counter is cleared to zero, and the rate limit mechanism
starts to count the number of bytes during the interval. The rate definition is described in register 6 (0x06) and 7
(0x07). The default setting is 0x63 (99 decimal). This is equal to a rate of 1%, calculated as follows:
Note: 148,800 frames/sec is based on 64-byte block of packets in 100BASE-TX with 12 bytes of IPG and 8 bytes
of preamble between two packets.
MII Interface Operation
The Media Independent Interface (MII) is specified in Clause 22 of the IEEE 802.3u Standard. It provides a
common interface between physical layer and MAC layer devices. The MII provided by the KS8893M is
connected to the device’s third MAC. The interface contains two distinct groups of signals: one for transmission
and the other for reception. The following table describes the signals used by the MII bus.
June 2005
External MAC
Controller Signals
MTXEN
MTXER
MTXD3
MTXD2
MTXD1
MTXD0
MTXC
MCOL
MCRS
MRXDV
MRXER
MRXD3
MRXD2
MRXD1
MRXD0
MRXC
KS8893M PHY-Mode Connections
148,800 frames/sec * 67ms/interval * 1% = 99 frames/interval (approx.) = 0x63
KS8893M
PHY Signals
SMTXEN
SMTXER
SMTXD[3]
SMTXD[2]
SMTXD[1]
SMTXD[0]
SMTXC
SCOL
SCRS
SMRXDV
(not used)
SMRXD[3]
SMRXD[2]
SMRXD[1]
SMRXD[0]
SMRXC
Pin
Descriptions
Transmit enable
Transmit error
Transmit data bit 3
Transmit data bit 2
Transmit data bit 1
Transmit data bit 0
Transmit clock
Collision detection
Carrier sense
Receive data valid
Receive error
Receive data bit 3
Receive data bit 2
Receive data bit 1
Receive data bit 0
Receive clock
Table 3. MII Signals
32
KS8893M MAC-Mode Connections
External
PHY Signals
MTXEN
MTXER
MTXD3
MTXD2
MTXD1
MTXD0
MTXC
MCOL
MCRS
MRXDV
MRXER
MRXD3
MRXD2
MRXD1
MRXD0
MRXC
KS8893M
MAC Signals
SMRXDV
(not used)
SMRXD[3]
SMRXD[2]
SMRXD[1]
SMRXD[0]
SMRXC
SCOL
SCRS
SMTXEN
SMTXER
SMTXD[3]
SMTXD[2]
SMTXD[1]
SMTXD[0]
SMTXC
M9999-063005