KS8893ML MICREL [Micrel Semiconductor], KS8893ML Datasheet - Page 104
KS8893ML
Manufacturer Part Number
KS8893ML
Description
Integrated 3-Port 10/100 Managed Switch with PHYs Preliminary Data Sheet Rev. 1.0
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
1.KS8893ML.pdf
(106 pages)
- Current page: 104 of 106
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Micrel
KS8893M/ML/MI
Reset Circuit
The reset circuit in Figure 28 is recommended for powering up the KS8893M if reset is triggered only by the
power supply.
VCC
D1: 1N4148
D1
R 10K
KS8893M
RST
C 10uF
Figure 28. Recommended Reset Circuit
The reset circuit in Figure 29 is recommended for applications where reset is driven by another device (e.g., CPU,
FPGA, etc),. At power-on-reset, R, C and D1 provide the necessary ramp rise time to reset the KS8893M device.
The RST_OUT_n from CPU/FPGA provides the warm reset after power up.
VCC
R 10K
D1
KS8893M
CPU/FPGA
RST
RST_OUT_n
D2
C 10uF
D1, D2: 1N4148
Figure 29. Recommended Reset Circuit for interfacing with CPU/FPGA Reset Output
June 2005
104
M9999-063005
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