KS8893ML MICREL [Micrel Semiconductor], KS8893ML Datasheet - Page 23

• Manufacturer Part Number: KS8893ML
• Description: Integrated 3-Port 10/100 Managed Switch with PHYs Preliminary Data Sheet Rev. 1.0
• Manufacturer: MICREL [Micrel Semiconductor]

10BASE-T Transmit
The 10BASE-T driver is incorporated with the 100BASE-TX driver to allow for transmission using the same
magnetics. They are internally wave-shaped and pre-emphasized into outputs with a typical 2.3V amplitude. The
harmonic contents are at least 27dB below the fundamental frequency when driven by an all-ones Manchester-
encoded signal.
10BASE-T Receive
On the receive side, input buffers and level detecting squelch circuits are employed. A differential input receiver
circuit and a phase-locked loop (PLL) perform the decoding function. The Manchester-encoded data stream is
separated into clock signal and NRZ data. A squelch circuit rejects signals with levels less than 400mV or with
short pulse widths to prevent noise at the RXP-or-RXM input from falsely triggering the decoder. When the input
exceeds the squelch limit, the PLL locks onto the incoming signal and the KS8893M decodes a data frame. The
receiver clock is maintained active during idle periods in between data reception.
Power Management
The KS8893M features a per-port power down mode. To save power, a PHY port that is not in use can be
powered down via port control register, or MII PHY register.
In addition, there is a full chip power down mode. When activated, the entire chip will be powered down.
MDI/MDI-X Auto Crossover
To eliminate the need for crossover cables between similar devices, the KS8893M supports HP Auto MDI/MDI-X
and IEEE 802.3u standard MDI/MDI-X auto crossover. HP Auto MDI/MDI-X is the default.
The auto-sense function detects remote transmit and receive pairs and correctly assigns transmit and receive
pairs for the KS8893M device. This feature is extremely useful when end users are unaware of cable types, and
also, saves on an additional uplink configuration connection. The auto-crossover feature can be disabled through
the port control registers, or MII PHY registers.
The IEEE 802.3u standard MDI and MDI-X definitions are:
June 2005
RJ-45 Pins
1
2
3
6
MDI
Table 2. MDI/MDI-X Pin Definitions
Signals
TD+
RD+
TD-
RD-
23
RJ-45 Pins
1
2
3
6
MDI-X
Signals
RD+
TD+
RD-
TD-
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