IR3895MPBF IRF [International Rectifier], IR3895MPBF Datasheet - Page 22

• Manufacturer Part Number: IR3895MPBF
• Description: 16A HIGHLY INTERGRATED SUPLRBUCK
• Manufacturer: IRF [International Rectifier]

3, the error‐amplifier (E/A) has been depicted with three
positive inputs. Ideally, the input with the lowest voltage
is used for regulating the output voltage and the other
two inputs are ignored. In practice the voltage of the other
two inputs should be about 200mV greater than the
low‐voltage input so that their effects can completely
be ignored. Vp is internally biased to 3.3V via a high
impedance path. For normal operation, Vp and Vref is
left floating (Vref should have a bypass capacitor).
Therefore, in normal operating condition, after Enable
goes high, the internal soft‐start (Intl_SS) ramps up the
output voltage until Vfb (voltage of feedback/Fb pin)
reaches about 0.5V. Then Vref takes over and the output
voltage is regulated..
Tracking‐mode operation is achieved by connecting Vref to
GND. Then, while Vp=0, Enable is taken above its threshold
so that the soft‐start circuit generates Intl_SS signal. After
the Intl_SS signal reaches the final value (refer to Fig.5c) ,
ramping up the Vp input will ramp up the output voltage.
In tracking mode, Vfb always follows Vp which means Vout
is always proportional to Vp voltage (typical for DDR/Vtt
rail applications). The effective Vp variation range is
0V~1.2V.
In sequencing mode of operation (simultaneous or
ratiometric), Vref is left floating and Vp is kept to ground
level until Intl_SS signal reaches the final value. Then Vp is
ramped up and Vfb follows Vp. When Vp>0.5V the error‐
amplifier switches to Vref and the output voltage is
regulated with Vref.The final Vp voltage after sequencing
startup should between 0.7V ~ 3.3V.
22
AUGUST 08, 2012 | DATA SHEET| Rev 3.1
Single‐Input Voltage, Synchronous Buck Regulator
- 22 -P
16A Highly Integrated SupIRBuck
Tracking and sequencing operations can be implemented
to be simultaneous or ratiometric (refer to Fig. 13 and 14).
Figure 12 shows typical circuit configuration for sequencing
operation. With this power‐up configuration, the voltage
at the Vp pin of the slave reaches 0.5V before the Fb pin of
the master. If R
achieved. That is, the output voltage of the slave follows
that of the master until the voltage at the Vp pin of the
slave reaches 0.5 V. After the voltage at the Vp pin of the
slave exceeds 0.5V, the internal 0.5V reference of the
slave dictates its output voltage. In reality the regulation
gradually shifts from Vp to internal Vref. The circuit shown
in Fig. 12 can also be used for simultaneous or ratiometric
tracking operation if Vref of the slave is connected to GND.
Table 2 summarizes the required conditions to achieve
simultaneous/ratiometric tracking or sequencing
operations.
Figure 13: Typical waveforms for sequencing mode of operation:
R
R
(master)
E
F
Vo1
PGood
6.8 V < Vin < 21 V
1.2V
(a)
(b)
Figure 12: Application Circuit for Simultaneous
Vref=0.5V
Vcc
(a) simultaneous, (b) ratiometric
Vref
Vcc/LDO
Sync
PGood
E
Vp
Rt/
/R
and Ratiometric Sequencing
S_Ctrl
F
=R
Gnd
EN
Soft Start (slave)
C
Enable (slave)
/R
D
Vin
, simultaneous startup is
Vo2 (slave)
Vo2 (slave)
PGnd
PVin
Comp
Vsns
Boot
SW
Fb
Vo1 (master)
Vo1 (master)
IR3895
R
PD‐97746
C
R
D
(Salve)
Vo2