EMC12 ETC2 [List of Unclassifed Manufacturers], EMC12 Datasheet - Page 31

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EMC12

Manufacturer Part Number
EMC12
Description
Audio Interface for the EmPack System
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet

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The output frequency of CLK/X is given by:
where f
For a reference clock of 14.318MHz, Table 20 shows the bit stream associated with several commonly
used DSP clock frequencies. Note that CLK/X is multiplied by 4 to generate the DSP clock.
Refer to ICS AV9110 data sheet for more information on programming the device.
09 Jan 2006
REF
f
CLK/X
is the input reference clock.
= (f
REF
Bit(s)
0 - 6
7 - 13
14
15 - 16
17 - 18
19
20
21
22
23
N V ) / (M R X)
Table 1-20: Common AV9110 Data Stream
DSP Clock Frequency (MHz)
50
74
80
Table 1-19: AV9110 Serial Data Format
Field
N
M
V
X
R
CLK_EN
CLK/X_EN
Reserved
CLK_SEL
Reserved
Communication Automation Corporation
EMC12 Hardware Reference Manual
Function
VCO Frequency Divider
Reference Frequency Divider
VCO Pre-scale Divider
0b = divide by 1
1b = divide by 8
CLK/X Output Divider
00b = divide by 1
01b = divide by 2
10b = divide by 4
11b = divide by 8
VCO Output Divider
00b = divide by 1
01b = divide by 2
10b = divide by 4
11b = divide by 8
CLK Output Enable
0b = tristate
CLK/X Output Enable
0b = tristate
Should be 1
Reference clock select on CLK
1b = reference frequency
Should be 1
Bit Stream (Bit 23 - Bit 0)
0xB305CD
0xB304DD
0xB288DF
Default
1111111b
0010010b
0b
10b
10b
1b
1b
1b
0b
1b
1-27

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