EMC12 ETC2 [List of Unclassifed Manufacturers], EMC12 Datasheet - Page 22

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EMC12

Manufacturer Part Number
EMC12
Description
Audio Interface for the EmPack System
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet

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EMC12 Hardware Reference Manual
This scheme of using two FIFOs and switching at frame boundary ensures that TDM control maps are
always valid and consistent.
1.3.6 TDM Last Control Word
Due to hardware limitations, the last TDM control word of the FIFO is not actually used for TDM
control. It is replaced on the fly with the contents of the “Last TDM Control Word” register of the
FPGA. Therefore, all software that affects the EmC12 TDM map must take this into account and make
sure that the “Last TDM Control Word” register is accessed instead of the last FIFO word.
1.3.7 TDM Reset
After power-on or board reset, the TDM_RESET bit in BCR0 is ‘0’. This bit can also be read/written by
the base board using the PIO interface.
When the TDM_RESET bit is ‘0’, the EMC12’s TDM system becomes idle. It does not drive any of the
LTDM lines or DSP SIO signals. Before writing a ‘1’ to the TDM_RESET bit, the base board should
setup the FIFOs with valid TDM control words. The TDM becomes active at the second frame
boundary after TDM_RESET become ‘1’.
09 Jan 2006
Communication Automation Corporation
1-18

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