ADP5061 AD [Analog Devices], ADP5061 Datasheet - Page 8

• Manufacturer Part Number: ADP5061
• Description: Tiny I2C Programmable Linear Battery Charger
• Manufacturer: AD [Analog Devices]

ADP5061
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
1
2
3
Pin No.
E2, D2, C2
E3, D3, C3
B1
E1, D1, C1
A4
A3
E4
C4
B4
B2
D4
A1
A2
B3
I is input, O is output, I/O is input/output, G is ground, and GPIO is factory programmable general-purpose input/output.
See the Digital Input and Output Options section for details.
DIG_IOx setting defines the initial state of the ADP5061. When the parameter or the mode that is related to each DIG_IOx pin setting is changed (by programming the
equivalent I
2
C register bit or bits), the I
Name
ISO_S1, ISO_S2,
ISO_S3
VIN1, VIN2, VIN3
AGND
ISO_B1, ISO_B2,
ISO_B3
SCL
SDA
DIG_IO1
DIG_IO2
DIG_IO3
THR
BAT_SNS
ILED
SYS_EN
CBP
Type
I/O
I/O
G
I/O
I
I/O
GPIO
GPIO
GPIO
I
I
O
O
I/O
2
C register setting dominates over the DIG_IOx pin setting. VINx connection or disconnection resets control to the DIG_IOx pin.
1
High current input/output.
Analog Ground.
Set Input Current Limit. This pin sets the input current limit directly. When DIG_IO1 = low or
high-Z, the input limit is 100 mA. When DIG_IO1 = high, the input limit is 500 mA.
Disable IC1. This pin sets the charger to the low current mode. When DIG_IO2 = low or high-Z, the
charger operates in normal mode. When DIG_IO2 = high, the LDO and the charger are disabled
and VINx current consumption is 280 µA (typical). 20 V VINx input protection is disabled and VINx
voltage level must be equal to or lower than 5.5 V.
Enable Charging. When DIG_IO3 = low or high-Z, charging is disabled. When DIG_IO3 = high,
charging is enabled.
Battery Pack Thermistor Connection. If this pin is not used, connect a dummy 10 kΩ resistor from THR
to GND.
Battery Voltage Sense Pin.
Bypass Capacitor Input.
Description
Linear Charger Supply Side Input to the Internal Isolation FET/Battery Current Regulation FET.
Power Connections to USB VBUS. These pins are high current inputs when in charging mode.
Battery Supply Side Input to Internal Isolation FET/Battery Current Regulation FET.
I
I
Open-Drain Output to Indicator LED.
System Enable. This is the battery OK flag/open-drain pull-down FET pin to enable the system
when the battery level reaches the V
2
2
C-Compatible Interface Serial Clock.
C-Compatible Interface Serial Data.
A
D
E
B
C
ISO_B3
BALL A1 CORNER
ISO_B2
ISO_B1
AGND
ILED
1
Figure 3. Pin Configuration
Rev. 0 | Page 8 of 44
2, 3
(BALL SIDE DOWN)
SYS_EN
ISO_S3
ISO_S2
ISO_S1
THR
2
Not to Scale
TOP VIEW
VIN3
SDA
CBP
VIN2
VIN1
3
WEAK
BAT_SNS
DIG_IO2
DIG_IO1
DIG_IO3
SCL
level.
4
2, 3
Data Sheet
2, 3