NCP5331_05 ONSEMI [ON Semiconductor], NCP5331_05 Datasheet - Page 15

• Manufacturer Part Number: NCP5331_05
• Description: Two-Phase PWM Controller with Integrated Gate Drivers
• Manufacturer: ONSEMI [ON Semiconductor]

with higher current, the PWM cycle will terminate earlier
providing negative feedback. The NCP5331 provides a CSx
input for each phase, but the CS
common to all phases. Current sharing is accomplished by
referencing all phases to the same CS
so that a phase with a larger current signal will turn off earlier
than a phase with a smaller current signal.
employing both “slow” and “fast” voltage regulation. The
internal error amplifier performs the slow regulation.
Depending on the gain and frequency compensation set by
the amplifier’s external components, the error amplifier will
typically begin to ramp its output to react to changes in the
output voltage in 1−2 PWM cycles. Fast voltage feedback is
implemented by a direct connection from V
noninverting pin of the PWM comparator via the summation
with the inductor current, internal ramp, and the Startup
OFFSET. A rapid increase in load current will produce a
negative offset at V
This will cause the PWM duty cycle to increase almost
instantly. Fast feedback will typically adjust the PWM duty
cycle within 1 PWM cycle.
at a 50% duty cycle) is added to the inductor current ramp at
the positive terminal of the PWM comparator. This additional
ramp compensates for propagation time delays from the
current sense amplifier (CSA), the PWM comparator, and the
MOSFET gate drivers. As a result, the minimum ON time of
the controller is reduced and lower duty cycles may be
achieved at higher frequencies. Also, the additional ramp
reduces the reliance on the inductor current ramp and allows
greater flexibility when choosing the output inductor and the
RSxCSx (x = 1 or 2) time constant (see Figure 15) of the
feedback components from V
feedback signal allows the open loop output impedance of
the power stage to be controlled. When the average output
current is zero, the COMP pin will be
Enhanced V
As shown in Figure 14, an internal ramp (nominally 125 mV
Including both current and voltage information in the
Figure 15. Enhanced V
SWNODE
2
responds to disturbances in V
CORE
(V
CORE
V
OUT
and at the output of the summer.
)
CORE
REF
2
+
Lx
Control Employing Lossless Inductive Current Sensing and Internal Ramp
to the CSx pin.
RLx
and COMP inputs are
REF
RSx
CSx
and COMP pins,
CORE
CORE
CSx
x = 1 or 2
CS
V
V
COMP
http://onsemi.com
to the
FFB
FB
REF
NCP5331
by
DAC
Out
“Fast−Feedback”
15
Connection
+
−
CSA
duty cycle, Ext_Ramp is the peak−to−peak external
steady−state ramp at 0 A, G
Amplifier Gain (nominally 2.0 V/V), and the Startup Offset
is typically 0.60 V. The magnitude of the Ext_Ramp can be
calculated from
and the input voltage is 12.0 V, the duty cycle (D) will be
1.225/12.0 or 10.2%. Int_Ramp will be 125 mV 10.2/50 =
25.5 mV. Realistic values for RSx, CSx and f
0.1 mF, and 200 kHz
mentioned formula, Ext_Ramp will be 9.8 mV.
changes, there must also be a change in the output voltage.
Or, in a closed loop configuration when the output current
changes, the COMP pin must move to keep the same output
voltage. The required change in the output voltage or COMP
pin depends on the scaling of the current feedback signal and
is calculated as
Single Stage Impedance + DV OUT DI OUT + R S @ G CSA
single−phase output impedance divided by the number of
phases. The output impedance of the power stage determines
how the converter will respond during the first few
Internal Ramp
Ext_Ramp + D @ (V IN * V CORE ) (RSx @ CSx @ f SW )
V COMP + V CORE @ 0 A ) Channel_Startup_Offset
Int_Ramp is the internal ramp value at the corresponding
For example, if V
If the COMP pin is held steady and the inductor current
The single−phase power stage output impedance is
The multiphase power stage output impedance is the
−
+
COn
V COMP + 1.225 V ) 0.60 V ) 25.5 mV
Error
Amp
Start−Up
Channel
Offset
) Int_Ramp ) G CSA @ Ext_Ramp 2
DV + RSx @ G CSA @ DI OUT .
− +
+ 1.855 Vdc.
CORE
) 2.0 V V @ 9.8 mV 2
at 0 A is set to 1.225 V with AVP
using these and the previously
+
−
CSA
COMP
PWM
is the Current Sense
To F/F
Reset
SW
are 5.6 kW,