XCF16PVO48C XILINX [Xilinx, Inc], XCF16PVO48C Datasheet - Page 9

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XCF16PVO48C

Manufacturer Part Number
XCF16PVO48C
Description
Platform Flash In-System Programmable Configuration PROMs
Manufacturer
XILINX [Xilinx, Inc]
Datasheet

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Platform Flash PROM TAP Characteristics
The Platform Flash PROM family performs both in-system
programming and IEEE 1149.1 boundary-scan (JTAG)
testing via a single 4-wire Test Access Port (TAP). This
simplifies system designs and allows standard Automatic
Test Equipment to perform both functions. The AC
characteristics of the Platform Flash PROM TAP are
described as follows.
TAP AC Parameters
Table 10
Table 10: Test Access Port Timing Parameters
DS123 (v2.11.1) March 30, 2007
Product Specification
T
T
T
T
T
T
CKMIN
MSS
MSH
DIS
DIH
DOV
Symbol
shows the timing parameters for the TAP waveforms shown in
TCK
TDO
TMS
TDI
R
TCK minimum clock period when V
TMS setup time when V
TMS hold time when V
TDI setup time when V
TDI hold time when V
TDO valid delay when V
T
CKMIN
T
DIS
T
CCJ
MSS
CCJ
CCJ
CCJ
CCJ
Figure 4: Test Access Port Timing
= 2.5V or 3.3V
= 2.5V or 3.3V
= 2.5V or 3.3V
= 2.5V or 3.3V
= 2.5V or 3.3V
Description
CCJ
www.xilinx.com
Platform Flash In-System Programmable Configuration PROMs
= 2.5V or 3.3V
T
DIH
T
MSH
TAP Timing
Figure 4
These TAP timing characteristics are identical for both
boundary-scan and ISP operations.
Figure
shows the timing relationships of the TAP signals.
T
DOV
4.
Min
100
10
25
10
25
DS026_04_020300
Max
30
Units
ns
ns
ns
ns
ns
ns
9

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