HYB18H256321BF QIMONDA [Qimonda AG], HYB18H256321BF Datasheet - Page 33

• Manufacturer Part Number: HYB18H256321BF
• Description: 256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM
• Manufacturer: QIMONDA [Qimonda AG]

4.11
Rev. 0.80, 2007-09
09132007-07EM-7OYI
Parameter
Clock and Clock Enable
System frequency
Clock high level width
Clock low-level width
Minimum clock half period
Command and Address Setup and Hold Timing
Address/Command input setup time
Address/Command input hold time
Address/Command input pulse width
Mode Register Set Timing
Mode Register Set cycle time
Mode Register Set to READ timing
Row Timing
Row Cycle Time
Row Active Time
ACT(a) to ACT(b) Command period
Row Precharge Time
Row to Column Delay Time for Reads
Row to Column Delay Time for Writes
Column Timing
CAS(a) to CAS(b) Command period
Write to Read Command Delay
Read to Write command delay
Write Cycle Timing Parameters for Data and Data Strobe
Write command to first WDQS latching
transition
AC Timings for HYB18H256321BF
CL=13
CL= 12
CL= 11
CL =10
CL = 9
CL = 8
CL = 7
CAS latency
Symbol Limit Values
f
f
f
f
f
f
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CK13
CK12
CK11
CK10
CK9
CK8
CK7
CH
CL
HP
IS
IH
IP
MRD
MRDR
RC
RAS
RRD
RP
RCDRD
RCDWR
CCD
WTR
RTW
DQSS
–10
Min.
—
TBD
400
400
400
400
400
0.45
0.45
0.45
0.24
0.24
0.7
6
12
37
23
9
14
13
t
2
7
t
WL–
0.25
RCDWR(Min)
RTW
(min)= (CL + BL/2 +2 -WL)
Max.
—
1000
900
800
700
600
550
0.55
0.55
—
—
—
—
—
—
—
—
—
—
—
—
—
WL+
0.25
33
= max(
–11
Min.
—
—
400
400
400
400
400
0.45
0.45
0.45
0.27
0.27
0.7
6
12
35
22
8
13
12
2
6
WL–
0.25
t
RCDRD(Min)
Max.
—
—
900
800
700
600
550
0.55
0.55
—
—
—
—
—
—
—
—
—
—
—
—
—
WL+
0.25
Timing Parameters for HYB18H256321BF
- (WL + 1) ×
–12
Min.
—
—
400
400
400
400
400
0.45
0.45
0.45
0.3
0.3
0.7
6
12
34
21
8
13
12
2
6
WL–
0.25
Max.
—
—
800
700
650
550
500
0.55
0.55
—
—
—
—
—
—
—
—
—
—
—
—
—
WL+
0.25
t
CK
;2×
–14
Min.
—
—
400
400
400
400
400
0.45
0.45
0.45
0.35
0.35
0.7
6
12
30
18
7
12
11
2
5
WL–
0.25
t
CK
)
Internet Data Sheet
HYB18H256321BF
Max.
—
—
700
650
600
500
450
0.55
0.55
—
—
—
—
—
—
—
—
—
—
—
—
—
WL+
0.25
256-Mbit GDDR3
TABLE 19
Unit Note
MHz
MHz
MHz
MHz
MHz
MHz
MHz
t
t
t
ns
ns
t
t
t
t
t
t
t
t
t
t
t
t
t
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
1)
2)
1)
1)
1)
1)
3)
4)5)
3)
6)
7)
8)
9)
10)