NAND01G-B STMICROELECTRONICS [STMicroelectronics], NAND01G-B Datasheet - Page 37

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NAND01G-B

Manufacturer Part Number
NAND01G-B
Description
1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
NAND01G-B, NAND02G-B
Figure 16. Blocks Unlock Operation
7.3
7.4
WP
I/O
Blocks Unlock
If the Start Block Address is the same as the End Block Address, only one block is unlocked.
Only one consecutive area of blocks can be unlocked at any one time. It is not possible to
unlock multiple areas.
1. Three address cycles are required for 2 Gb devices. 1Gb devices only require two address cycles.
Blocks Lock-Down
The Lock-Down feature provides an additional level of protection. A Locked-down block
cannot be unlocked by a software command. Locked-Down blocks can only be unlocked by
setting the Write Protect signal to Low for a minimum of 100ns.
Only locked blocks can be locked-down. The command has no affect on unlocked blocks.
Refer to
command.
Block Lock Status
In Block Lock mode (PRL High) the Block Lock Status of each block can be checked by
issuing a Read Block Lock Status command (see
The command consists of:
After this, a read cycle will then output the Block Lock Status on the I/O pins on the falling
edge of Chip Enable or Read Enable, whichever occurs last. Chip Enable or Read Enable
do not need to be toggled to update the status.
The Read Block Lock Status command will not be accepted while the device is busy (RB
Low).
The device will remain in Read Block Lock Status mode until another command is issued.
Command
23h
one bus cycle to give the command code
three bus cycles to give the block address
Figure 23: Command Latch AC Waveforms
Start Block Address, 3 cycles
Add1
Add2 Add3
24h
Table 10:
for details on how to issue the
End Block Address, 3 cycles
Add1
Commands).
Add2 Add3
Data protection
ai08670
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