M28W640FCT STMICROELECTRONICS [STMicroelectronics], M28W640FCT Datasheet - Page 5

• Manufacturer Part Number: M28W640FCT
• Description: 64 Mbit (4Mb x16, Boot Block) 3V Supply Flash Memory
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

SUMMARY DESCRIPTION
The M28W640FCT and M28W640FCB are 64
Mbit (4 Mbit x 16) non-volatile Flash memories that
can be erased electrically at block level and pro-
grammed in-system on a Word-by-Word basis us-
ing a 2.7V to 3.6V V
a 1.65V to 3.6V V
pins. An optional 12V V
ed to speed up customer programming.
The devices feature an asymmetrical blocked ar-
chitecture. They have an array of 135 blocks: 8
Parameter Blocks of 4 KWord and 127 Main
Blocks of 32 KWord. The M28W640FCT has the
Parameter Blocks at the top of the memory ad-
dress space while the M28W640FCB locates the
Parameter Blocks starting from the bottom. The
memory maps are shown in
dresses.
The M28W640FCT and M28W640FCB feature an
instant, individual block locking scheme that al-
lows any block to be locked or unlocked with no la-
tency, enabling instant code and data protection.
All blocks have three levels of protection. They can
be locked and locked-down individually preventing
any accidental programming or erasure. There is
an additional hardware protection against program
and erase. When V
tected against program or erase. All blocks are
locked at Power Up.
Each block can be erased separately. Erase can
be suspended in order to perform either read or
program in any other block and then resumed.
Program can be suspended to read data in any
other block and then resumed. Each block can be
programmed and erased over 100,000 cycles.
The device includes a 192 bit Protection Register
to increase the protection of a system design. The
Protection Register is divided into a 64 bit segment
and a 128 bit segment. The 64 bit segment con-
tains a unique device number written by ST, while
the second one is one-time-programmable by the
user. The user programmable segment can be
permanently protected.
tection Register Memory Map.
Program and Erase commands are written to the
Command Interface of the memory. An on-chip
Program/Erase Controller takes care of the tim-
ings necessary for program and erase operations.
The end of a program or erase operation can be
detected and any error conditions identified. The
command set required to control the memory is
consistent with JEDEC standards.
The memory is offered in TSOP48 (12 X 20mm)
and TFBGA48 (6.39 x 10.5mm, 0.75mm pitch)
packages and is supplied with all the bits erased
(set to ’1’).
DDQ
PP
DD
supply for the Input/Output
supply for the circuitry and
PP
Figure
V
PPLK
power supply is provid-
Figure 5., Block Ad-
6., shows the Pro-
all blocks are pro-
In addition to the standard version, the packages
are also available in Lead-free version, in compli-
ance with JEDEC Std J-STD-020B, the ST ECO-
PACK 7191395 Specification, and the RoHS
(Restriction of Hazardous Substances) directive.
All packages are compliant with Lead-free solder-
ing processes.
Figure 2. Logic Diagram
Table 1. Signal Names
A0-A21
DQ0-DQ15
E
G
W
RP
WP
V
V
V
V
NC
DD
DDQ
PP
SS
A0-A21
WP
RP
W
G
E
22
M28W640FCT, M28W640FCB
Address Inputs
Data Input/Output
Chip Enable
Output Enable
Write Enable
Reset
Write Protect
Core Power Supply
Power Supply for
Input/Output
Optional Supply Voltage for
Fast Program & Erase
Ground
Not Connected Internally
V DD
M28W640FCB
M28W640FCT
V SS
V DDQ V PP
16
DQ0-DQ15
AI09903
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