HD6433045 HITACHI [Hitachi Semiconductor], HD6433045 Datasheet - Page 455
HD6433045
Manufacturer Part Number
HD6433045
Description
Hitachi Single-Chip Microcomputer
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6433045.pdf
(867 pages)
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Bit 7—Communication Mode
synchronous mode.
Bit 7
C/A
0
1
Bit 6—Character Length (CHR): Selects 7-bit or 8-bit data length in asynchronous mode. In
synchronous mode the data length is 8 bits regardless of the CHR setting.
Bit 6
CHR
0
1
Note: * When 7-bit data is selected, the MSB (bit 7) in TDR is not transmitted.
Bit 5—Parity Enable (PE): In asynchronous mode, this bit enables or disables the addition of a
parity bit to transmit data, and the checking of the parity bit in receive data. In synchronous mode
the parity bit is neither added nor checked, regardless of the PE setting.
Bit 5
PE
0
1
Note: * When PE is set to 1, an even or odd parity bit is added to transmit data according to the
even or odd parity mode selected by the O/E bit, and the parity bit in receive data is
checked to see that it matches the even or odd mode selected by the O/E bit.
Description
Asynchronous mode
Synchronous mode
Description
8-bit data
7-bit data*
Description
Parity bit not added or checked
Parity bit added and checked*
(C/A): Selects whether the SCI operates in asynchronous or
444
(Initial value)
(Initial value)
(Initial value)
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