SSTUB32866EC/S NXP [NXP Semiconductors], SSTUB32866EC/S Datasheet - Page 21

• Manufacturer Part Number: SSTUB32866EC/S
• Description: 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
SSTUB32866_4
Product data sheet
11.4 Partial parity out load circuit and voltage measurement information
V
All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz; Z
Fig 23. Voltage waveforms, open-drain output LOW to HIGH transition time with respect
Fig 24. Partial parity out load circuit
Fig 25. Partial parity out voltage waveforms; propagation delay times with respect to
DD
= 1.8 V ± 0.1 V.
(1) C
to clock inputs
V
t
V
clock inputs
PLH
L
T
i(p-p)
includes probe and jig capacitance.
= 0.5V
and t
= 600 mV.
All information provided in this document is subject to legal disclaimers.
PHL
DD
o
waveform 2
= 50 Ω; input slew rate = 1 V/ns ± 20 %, unless otherwise specified.
.
are the same as t
CK
CK
output
timing
inputs
Rev. 04 — 15 April 2010
output
1.8 V DDR2-800 configurable registered buffer with parity
DUT
t
V
PLH
OUT
ICR
PD
.
V
t
LH
ICR
C
0.15 V
L
= 5 pF
(1)
V
ICR
t
V
V
PHL
ICR
T
test point
R
002aaa654
L
002aaa503
= 1 kΩ
SSTUB32866
002aaa375
V
i(p-p)
V
V
V
0 V
OH
OL
V
OH
i(p-p)
© NXP B.V. 2010. All rights reserved.
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