SSTUB32866EC/S NXP [NXP Semiconductors], SSTUB32866EC/S Datasheet - Page 20

• Manufacturer Part Number: SSTUB32866EC/S
• Description: 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
SSTUB32866_4
Product data sheet
11.3 Error output load circuit and voltage measurement information
V
All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz; Z
Fig 20. Load circuit, error output measurements
Fig 21. Voltage waveforms, open-drain output LOW to HIGH transition time with respect
Fig 22. Voltage waveforms, open-drain output HIGH to LOW transition time with respect
DD
= 1.8 V ± 0.1 V.
(1) C
to RESET input.
to clock inputs
L
includes probe and jig capacitance.
All information provided in this document is subject to legal disclaimers.
o
waveform 1
waveform 2
= 50 Ω; input slew rate = 1 V/ns ± 20 %, unless otherwise specified.
RESET
output
timing
inputs
output
Rev. 04 — 15 April 2010
LVCMOS
1.8 V DDR2-800 configurable registered buffer with parity
t
DUT
PLH
OUT
t
V
HL
0.5V
ICR
0.15 V
DD
0.5V
DD
C
L
= 10 pF
V
ICR
(1)
V
DD
R
test point
002aaa500
L
002aaa502
= 1 kΩ
SSTUB32866
002aaa501
V
V
V
V
0 V
V
0 V
DD
OL
i(p-p)
DD
OH
© NXP B.V. 2010. All rights reserved.
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