ATA6602-PLQW ATMEL [ATMEL Corporation], ATA6602-PLQW Datasheet - Page 347

• Manufacturer Part Number: ATA6602-PLQW
• Description: Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
• Manufacturer: ATMEL [ATMEL Corporation]

5.4
4921C–AUTO–01/07
Note:
0x1D (0x3D)
0x1C (0x3C)
0x0D (0x2D)
0x0C (0x2C)
0x1E (0x3E)
0x1B (0x3B)
0x1A (0x3A)
0x0E (0x2E)
0x0B (0x2B)
0x0A (0x2A)
0x1F (0x3F)
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x0 (0x20)
Address
Register Summary (Continued)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
5. Only valid for ATA6602/ATA6603
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATA6602/ATA6603 is
a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for
the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and
LD/LDS/LDD instructions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GPIOR0
PORTD
PORTC
PORTB
EIMSK
PCIFR
DDRD
EECR
TIFR2
TIFR1
TIFR0
DDRC
DDRB
Name
PIND
PINC
PINB
EIFR
PORTD7
PORTB7
PIND7
PINB7
DDD7
DDB7
Bit 7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD6
PORTC6
PORTB6
PIND6
PINC6
PINB6
DDD6
DDC6
DDB6
Bit 6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD5
PORTC5
PORTB5
EEPM1
PIND5
PINC5
PINB5
DDD5
DDC5
DDB5
Bit 5
ICF1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
General Purpose I/O Register 0
PORTD4
PORTC4
PORTB4
EEPM0
PIND4
PINC4
PINB4
DDD4
DDC4
DDB4
Bit 4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD3
PORTC3
PORTB3
EERIE
PIND3
PINC3
PINB3
DDD3
DDC3
DDB3
Bit 3
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD2
PORTC2
PORTB2
EEMPE
OCF2B
OCF1B
OCF0B
PIND2
PINC2
PINB2
PCIF2
DDD2
DDC2
DDB2
Bit 2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
ATA6602/ATA6603
PORTD1
PORTC1
PORTB1
OCF2A
OCF1A
OCF0A
PIND1
PINC1
PINB1
INTF1
PCIF1
DDD1
DDC1
EEPE
DDB1
Bit 1
INT1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD0
PORTC0
PORTB0
PIND0
PINC0
PCIF0
PINB0
EERE
INTF0
DDD0
DDC0
DDB0
TOV2
TOV1
TOV0
Bit 0
INT0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Page
107
107
176
158
104
105
105
104
104
104
104
104
104
42
47
347