ATA6602-PLQW ATMEL [ATMEL Corporation], ATA6602-PLQW Datasheet - Page 346
ATA6602-PLQW
Manufacturer Part Number
ATA6602-PLQW
Description
Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATA6602-PLQW.pdf
(362 pages)
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5.4
Note:
346
0x3D (0x5D)
0x3C (0x5C)
0x2D (0x4D)
0x2C (0x4C)
0x3E (0x5E)
0x3B (0x5B)
0x3A (0x5A)
0x2E (0x4E)
0x2B (0x4B)
0x2A (0x4A)
0x3F (0x5F)
0x39 (0x59)
0x38 (0x58)
0x37 (0x57)
0x36 (0x56)
0x35 (0x55)
0x34 (0x54)
0x33 (0x53)
0x32 (0x52)
0x31 (0x51)
0x30 (0x50)
0x2F (0x4F)
0x29 (0x49)
0x28 (0x48)
0x27 (0x47)
0x26 (0x46)
0x25 (0x45)
0x24 (0x44)
0x23 (0x43)
0x22 (0x42)
0x21 (0x41)
0x20 (0x40)
Address
Register Summary (Continued)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
5. Only valid for ATA6602/ATA6603
ATA6602/ATA6603
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATA6602/ATA6603 is
a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for
the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and
LD/LDS/LDD instructions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
SPMCSR
Reserved
Reserved
Reserved
Reserved
Reserved
TCCR0B
TCCR0A
GPIOR2
GPIOR1
MCUCR
MCUSR
GTCCR
OCR0B
OCR0A
EEARH
TCNT0
EEARL
SMCR
SREG
SPDR
SPCR
EEDR
Name
ACSR
SPSR
SPH
SPL
COM0A1
FOC0A
SPMIE
Bit 7
SPIF
SPIE
ACD
TSM
SP7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
I
(RWWSB)
COM0A0
FOC0B
WCOL
ACBG
Bit 6
SPE
SP6
T
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
5.
COM0B1
DORD
Bit 5
ACO
SP5
H
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Timer/Counter0 Output Compare Register B
Timer/Counter0 Output Compare Register A
–
–
(EEPROM Address Register High Byte)
EEPROM Address Register Low Byte
General Purpose I/O Register 2
General Purpose I/O Register 1
(RWWSRE)
COM0B0
EEPROM Data Register
Timer/Counter0 (8-bit)
MSTR
Bit 4
PUD
SP4
ACI
SPI Data Register
S
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
5.
BLBSET
WGM02
WDRF
CPOL
ACIE
Bit 3
SM2
SP3
V
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
(SP10)
PGWRT
BORF
CPHA
CS02
ACIC
Bit 2
SM1
SP2
N
–
–
–
–
–
–
–
–
–
–
–
–
–
–
5.
5.
PSRASY
WGM01
PGERS
EXTRF
IVSEL
ACIS1
SPR1
CS01
Bit 1
SM0
SP9
SP1
Z
–
–
–
–
–
–
–
–
–
–
–
SELFPRGEN
PSRSYNC
WGM00
ACIS0
SPI2X
PORF
SPR0
CS00
IVCE
Bit 0
SP8
SP0
SE
C
–
–
–
–
–
–
–
–
–
–
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