ADM1041ARQ AD [Analog Devices], ADM1041ARQ Datasheet - Page 35

• Manufacturer Part Number: ADM1041ARQ
• Description: Secondary-Side Controller with Current Share and Housekeeping
• Manufacturer: AD [Analog Devices]

Table 6. Device SMBus Addresses
ADD1
0
0
0
1
1
1
Note: ADD1 is low by default. To access the additional three addresses it is necessary to set Config 4 < 1 > high and then perform a power cycle to allow the new
address to be latched after the EEPROM download. Refer to the section on Extended SMBUS Addressing for more details.
SDATA
SDATA
SCLK
SCLK
START BY
START BY
MASTER
MASTER
SDATA
SCLK
START BY
MASTER
A6
1
A6
1
Figure 25. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
ADD0
GND
V
NC
GND
V
NC
DD
DD
A5
A5
A6
19
SERIAL BUS ADDRESS BYTE
SERIAL BUS ADDRESS BYTE
A5
A4
A4
SERIAL BUS ADDRESS BYTE
A3
A4
A3
FRAME 1
FRAME 1
9
9
A2
A3
A2
FRAME 1
Figure 27. Reading Data from a Previously Selected Register
9
SDATA (CONTINUED)
SCLK (CONTINUED)
Figure 26. Writing to the Address Pointer Register Only
A2
0
0
1
0
0
1
A2
A1
A1
A1
A0
A0
A0
R/W
R/W
Rev. A | Page 35 of 64
ADM1041
ADM1041
ACK. BY
ACK. BY
R/W
ADM1041
ACK. BY
D7
1
D7
D7
1
1
A1
0
0
0
1
1
0
D7
D6
1
D6
D6
ADDRESS POINTER REGISTER BYTE
D6
D5
ADDRESS POINTER REGISTER BYTE
D5
D5
DATA BYTE FROM ADM1041
D4
D5
DATA BYTE
FRAME 3
D4
D4
D4
D3
FRAME 2
FRAME 2
FRAME 2
D3
D3
D3
D2
A0
0
1
0
0
1
1
D2
D2
D2
D1
D1
D1
D0
D1
ADM1041
ACK. BY
D0
D0
D0
9
ADM1041
ADM1041
ADM1041
ACK. BY
ACK. BY
ACK. BY
9
9
9
STOP BY
MASTER
Target Device
0
1
4
2
3
5
STOP BY
STOP BY
MASTER
MASTER
ADM1041