ADM1041ARQ AD [Analog Devices], ADM1041ARQ Datasheet - Page 14

• Manufacturer Part Number: ADM1041ARQ
• Description: Secondary-Side Controller with Current Share and Housekeeping
• Manufacturer: AD [Analog Devices]

ADM1041
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
Mnemonic
V
V
C
C
V
FD
GND
ICT
PULSE/AC
DD
LS
S
CMP
CMP
+
/C
S
–/FS
SENSE
1/MON1
Description
Positive Supply for the ASIC. Normal range is 4.5 V to 5.5 V. Absolute maximum rating is 6.5 V.
Inverting Differential Current Sense Input, Local Voltage Sense Pin, and OrFET Source. These three
functions are served by a common divider. The local voltage sense input is used for local overvoltage
and undervoltage sensing. This pin also provides an input to the false UV clamp that prevents
shutdown during an external load overvoltage condition. When supporting an OrFET circuit, this pin
represents the FET source and is the inverting input of a differential amplifier looking for the presence
of a reverse voltage across the FET, which might indicate a failure mode.
Noninverting Differential Current Sense Input. The differential sensitivity of C
around 10 mV to 40 mV at the input to the ASIC. Nulling any external divider offset is achieved by
injecting a trimmable amount of current into either the inverting or noninverting input of the second
stage of the current sense amplifier. A compensation circuit is used to ensure the amount of current
for zero-offset tracks the common-mode voltage. Nulling of any amplifier offset is done in a similar
manner except that it does not track the common-mode voltage.
Current Error Amplifier Compensation. This pin is the output of the current limit transconductance
error amplifier. A series resistor and a capacitor to ground are required for loop compensation.
Voltage Error Amplifier Compensation. This is the output of a voltage error transconductance
amplifier. Compensate with a series capacitor and resistor to ground. An external emitter-follower or
buffer is typically used to drive an optocoupler. Output voltage positioning may be obtained by
placing a second resistor directly to ground. Refer to Analog Devices applications notes on voltage
positioning.
A divider from the OrFET drain is connected here. A differential amplifier is then used to detect the
presence of a reverse voltage across the FET, which indicates a fault condition and causes the OrFET
gate to be pulled low.
Ground. This pin is double bonded for extra reliability. If the ground pin goes positive with respect to
the remote sense return (V
disconnected, PEN will be disabled.
Input for Current Transformer. The sensitivity of this pin is suitable for the typical 0.5 V to 1 V signal
that is normally available. If this function is enabled, the C
for extended SMBus addressing, i.e., pulled below ground to allow additional SMBus addresses.
Pulse Present, AC/Bulk Sense 1, or Monitor 1 Input.
PULSE: This tells the OrFET circuit that the voltage from the power transformer is normal. A peak hold
allows the OrFET circuit to pass through the pulse skipping that occurs with very light loads but turns
off the circuit about one second after the last pulse is recognized.
AC
voltage. If too low, AC_OK and DC_OK can warn of an imminent loss of power. Threshold level and
hysteresis can be trimmed. When not selected, AC
MON1: When MON1 is selected for this pin, its input is compared against a 1.25 V comparator that
could be used for monitoring a post regulated output; includes overvoltage, undervoltage, and
overtemperature conditions.
SENSE
PULSE/AC
1: This sense function also uses the peak voltage on this pin to measure the bulk capacitor
AC
SENSE
SENSE
CBD/ALERT
V
LS
1/MON1
2/MON2
/C
S
C
V
GND
–/FS
PEN
V
C
CMP
CMP
ICT
Figure 7. Pin Configuration
DD
F
S
+
D
Rev. A | Page 14 of 64
10
11
12
1
2
3
4
5
6
7
8
9
S
(Not to Scale)
ADM1041
–) for a sustained period indicating that the negative remote sense line is
TOP VIEW
24
23
22
21
20
19
18
17
16
15
14
13
SHRO
SHRS+
SCMP
V
V
F
V
DC_OK/MON4
PSON/MON3
ADD0
SDA/PS
SCL/AC_OKLink
S
S
G
REF
+
–/SHRS–
/AC_OK/OTP/MON5
ON
LINK
SENSE
1 defaults to true.
S
+ amplifier is disabled. This pin is also used
S
+ and C
S
– is normally