SAF-XE167F-48F66L INFINEON [Infineon Technologies AG], SAF-XE167F-48F66L Datasheet - Page 37

• Manufacturer Part Number: SAF-XE167F-48F66L
• Description: 16-Bit Single-Chip Real Time Signal Controller
• Manufacturer: INFINEON [Infineon Technologies AG]

Table 4
Pin
2,
36,
38,
72,
74,
108,
110,
144
1,
37,
73,
109
1) To generate the reference clock output for bus timing measurement,
2) Pin TRef was used to control the core voltage generation in step AA. For that step, pin TRef must be connected
Data Sheet
EXTCLK and P2.8 must be selected as output pin. Also the high-speed clock pad must be enabled. This
configuration is referred to as reference clock output signal CLKOUT.
to
This connection is no more required from step AB on. For the current step, pin TRef is logically not connected.
Future derivatives will feature an additional general purpose IO pin at this position.
V
DDPB
Symbol
V
V
DDPB
SS
.
Pin Definitions and Functions (cont’d)
Ctrl.
-
-
Type Function
PS/B Digital Pad Supply Voltage for Domain B
PS/-- Digital Ground
Connect decoupling capacitors to adjacent
V
Note: The on-chip voltage regulators and all ports
All
or ground-plane.
Note: Also the exposed pad is connected to
DDP
V
SS
/
V
35
except P5, P6, and P15 are fed from supply
voltage
The respective board area must be
connected to ground (if soldered) or left free.
SS
pins must be connected to the ground-line
pin pairs as close as possible to the pins.
V
DDPB
.
XE166 Family Derivatives
General Device Information
f
SYS
must be selected as source for
V2.1, 2008-08
XE167x
V
SS
.