PIC18F248-E/L MICROCHIP [Microchip Technology], PIC18F248-E/L Datasheet - Page 91

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PIC18F248-E/L

Manufacturer Part Number
PIC18F248-E/L
Description
28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
REGISTER 8-11:
© 2006 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
bit 7
Unimplemented: Read as ‘0’
CMIP: Comparator Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
EEIP: EEPROM Write Interrupt Priority bit
1 = High priority
0 = Low priority
BCLIP: Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
LVDIP: Low-Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3IP: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
ECCP1IP: ECCP1 Interrupt Priority bit
1 = High priority
0 = Low priority
Legend:
R = Readable bit
-n = Value at POR
Note 1: This bit is only available on PIC18F4X8 devices. For PIC18F2X8 devices, this bit
U-0
is unimplemented and reads as ‘0’.
CMIP
R/W-1
(1)
U-0
W = Writable bit
‘1’ = Bit is set
R/W-1
EEIP
(1)
(1)
R/W-1
BCLIP
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
LVDIP
PIC18FXX8
TMR3IP
R/W-1
x = Bit is unknown
DS41159E-page 89
ECCP1IP
R/W-1
bit 0
(1)

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