PIC18F248-E/L MICROCHIP [Microchip Technology], PIC18F248-E/L Datasheet - Page 122

• Manufacturer Part Number: PIC18F248-E/L
• Description: 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
• Manufacturer: MICROCHIP [Microchip Technology]

14.1
Timer3 can operate in one of these modes:
• As a timer
• As a synchronous counter
• As an asynchronous counter
The operating mode is determined by the clock select
bit, TMR3CS (T3CON register).
FIGURE 14-1:
FIGURE 14-2:
DS41159E-page 120
PIC18FXX8
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
Note 1: When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
TMR3IF Overflow
Interrupt Flag
bit
T1OSO/
T1OSI
T1CKI
Timer3 Operation
Data Bus<7:0>
T1OSO/
Write TMR3L
Read TMR3L
T1OSI
T1CKI
TMR3IF
Overflow
Interrupt
Flag bit
TIMER3 BLOCK DIAGRAM
TIMER3 BLOCK DIAGRAM CONFIGURED IN 16-BIT READ/WRITE MODE
T1OSC
8
TMR3H
TMR3H
T1OSC
TMR3H
8
To Timer1 Clock Input
Enable
Oscillator
T1OSCEN
8
TMR3
TMR3L
Oscillator
Enable
T1OSCEN
(1)
8
TMR3L
CLR
(1)
Clock
Internal
F
CLR
OSC
/4
TMR3ON
On/Off
Clock
Internal
F
OSC
TMR3CS
When TMR3CS = 0, Timer3 increments every instruc-
tion cycle. When TMR3CS = 1, Timer3 increments on
every rising edge of the Timer1 external clock input or
the Timer1 oscillator, if enabled.
When the Timer1 oscillator is enabled (T1OSCEN is set),
the RC1/T1OSI and RC0/T1OSO/T1CKI pins become
inputs. That is, the TRISC<1:0> value is ignored.
Timer3 also has an internal “Reset input”. This Reset
can be generated by the CCP module (Section 15.1
“CCP1 Module”).
1
0
/4
TMR3ON
T3CCPx
CCP Special Trigger
On/Off
TMR3CS
T3CKPS1:T3CKPS0
1
0
T3SYNC
T3CCPx
Prescaler
CCP Special Trigger
1, 2, 4, 8
T3CKPS1:T3CKPS0
0
1
T3SYNC
2
Prescaler
1, 2, 4, 8
0
1
© 2006 Microchip Technology Inc.
2
Synchronized
Clock Input
Synchronize
Sleep Input
Synchronized
det
Clock Input
Synchronize
Sleep Input
det