AT83C24NDS-PRRUM ATMEL [ATMEL Corporation], AT83C24NDS-PRRUM Datasheet - Page 18

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AT83C24NDS-PRRUM

Manufacturer Part Number
AT83C24NDS-PRRUM
Description
Smart Card Reader Interface with Power Management
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Power Modes
18
Table 5. Power Modes Description
AT83C24
Number
Mode
1
2
3
4
5
Shutdown
Bit
0
0
0
1
1
Two power-down modes are available to reduce the AT83C24 power consumption (see STUT-
DOWN bit in CONFIG1 register and LP bits in CONFIG3 register).
To enter in the mode number 4 (see Table 5), the sequence is the following:
The AT83C24 exits Power-down if a software/hardware reset is done or if SHUTDOWN bit is
cleared. The AT83C24 is then active immediately.
Either a hardware reset or a TWI command clearing the SHUTDOWN bit can cause an exit from
Power-down. The internal registers retain their value during the shutdown mode.
In Power-down mode, the device is sleeping and waiting for a wake up condition.
To reduce power consumption, the User should stop the clock on the CLK input after setting the
SHUTDOWN bit. The clock can be enabled again just before exiting SHUTDOWN (at least 10
µs before a START bit on SDA).
Figure 14. Transparent Mode Description
LP
Bit
X
X
X
0
1
Microcontroller
First select the Low-power mode by setting the LP bit
The activation of the SHUTDOWN bit can then be done.
CCLK
CRST
STEPREG
CIO
CC4
CC8
X
X
X
0
1
VCARD[1:0]
11
11
00
00
00
A1/RST
A2/CK
I/O
C4
C8
160 mA
Current
Typical
Supply
30 mA
70 mA
90 µA
30 µA
3 mA
AT83C24
Description
Step up mode: VCC = 3V, CVCC = 5V,
Icard
Icard
Regulator mode: VCC = 5.25V, CVCC = 5V,
Icvcc = 65mA
DC/DC off, CLK = 10MHz, VCC=3V to 5V
The TWI interface of the AT83C24 is active
but its analog blocs are switched off to reduce
the consumption
Pulsed mode of the internal 3V logic regulator
CCLK
CRST
CIO
CC4
CC8
= 65mA
= 0
SMART CARD
4234F–SCR–10/05

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