AIC1573 AIC [Analog Intergrations Corporation], AIC1573 Datasheet - Page 17

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AIC1573

Manufacturer Part Number
AIC1573
Description
5-bit DAC, Synchronous PWM Power Regulator with Simple PWM Power Regulator, LDO And Linear Controller
Manufacturer
AIC [Analog Intergrations Corporation]
Datasheet
Output Inductor Selection
Inductor value and type should be chosen based on
output slew rate requirement, output ripple require-
ment and expected peak current. Inductor value is
primarily controlled by the required current respon-
se time. The AIC1573 will provide either 0% or
100% duty cycle in response to a load transient.
The response time to a transient is different for the
application of load and remove of load.
load current step.
In a typical 5V input, 2V output application, a 3 H
inductor has a 1A/ S rise time, resulting in a 5 S
delay in responding to a 5A load current step. To
optimize performance, different combinations of i n -
put and output voltage and expected loads may re-
quire different inductor value. A smaller value of i n -
ductor will improve the transient response at the
expense of increase output ripple voltage and i n -
ductor core saturation rating.
Peak current in the inductor will be equal to the
maximum output load current plus half of inductor
ripple current. The ripple current is approximately
equal to:
f = AIC1573 oscillator frequency.
The inductor must be able to withstand peak cur-
rent without saturation, and the copper resistance
in the winding should be kept as low as possible to
minimize resistive power loss
Input Capacitor Selection
Most of the input supply current is supplied by the
input bypass capacitor, the resulting RMS current
flow in the input capacitor will heat it up. Use a mix
I
t
t
RIPPLE
RISE
FALL
=
=
L
V
L
IN
(V
V
OUT
IN
I
V
I
OUT
OUT
f
OUT
V
.
L V
OUT
,
) V
Where
IN
OUT
;
I
OUT
is transient
of input bulk capacitors to control the voltage over-
shoot across the upper MOSFET. The ceramic ca-
pacitance for the high frequency decoupling should
be placed very close to the upper MOSFET to sup-
press the voltage induced in the parasitic circuit
impedance. The buck capacitors to supply the
RMS current is approximate equal to:
, where
The capacitor voltage rating should be at least 1.25
times greater than the maximum input voltage.
PWM MOSFET Selection
In high current PWM application, the MOSFET
power dissipation, package type and heatsink are
the dominant design factors. The conduction loss is
the only component of power dissipation for the
lower MOSFET, since it turns on into near zero
voltage. The upper MOSFET has conduction loss
and switching loss. The gate charge losses are
proportional to the switching frequency and are dis-
sipated by the AIC1573. However, the gate charge
increases the switching interval, t
the upper MOSFET switching losses. Ensure that
both MOSFETs are within their maximum junction
temperature at high ambient temperature by calcu-
lating the temperature rise according to package
thermal resistance specifications.
The equations above do not model power loss due
to the reverse recovery of the lower MOSFET’s bo-
dy diode.
The R
tions even if the type devices is used for both. This
I
P
P
RMS
UPPER
LOWER
DS(ON)
(1 D)
D
I
I
OUT
OUT
V
is different for the two previous equa-
V
2
OUT
2
IN
D
R
R
DS(ON)
DS(ON)
I
2
OUT
D
(1
12
I
D)
1
OUT
SW
, which increase
AIC1573
V
V
f L
IN
IN
2
D
t
SW
17
2
f

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