AIC1573 AIC [Analog Intergrations Corporation], AIC1573 Datasheet - Page 13

• Manufacturer Part Number: AIC1573
• Description: 5-bit DAC, Synchronous PWM Power Regulator with Simple PWM Power Regulator, LDO And Linear Controller
• Manufacturer: AIC [Analog Intergrations Corporation]

Each linear output initially follows a ramp. When
each output reaches sufficient voltage the input ref-
erence clamp slows the rate of output voltage rise.
The PGOOD signal toggles ‘high’ when all output
voltage levels have exceeded their under-voltage
levels.
A simplified schematic is shown in figure 1 7. An
over-voltage detected on VSEN1 immediately sets
the fault latch. A sequence of three over-current
fault signals also sets the fault latch. The over-
current latch is set dependent on the status of the
over-current (OC1 and OC2), linear under-voltage
(LUV) and the soft-start signal. An under-voltage
event on either linear output (VSEN3, VSEN4) is
ignored until the soft-start interval. Cycling the bias
input voltage (+12V off then on) resets the counter
and the fault latch.
Gate Drive Overlap Protection
The Overlap Protection circuit ensures that the Bot-
tom MOSFET does not turn on until the Upper
MOSFET source has reached a voltage low enough
to ensure that shoot-through will not occur.
0.15V
OC1
OC2
LUV
4.0V
SS
OV
+
+
Fig. 17 Simplified Schematic of Fault Logic
Over Current
R
S
Latch
Q
POR
INHIBIT
R
Counter
S
Fault Protection
All four outputs are monitored and protected
against extreme overload. A sustained overload on
any output or over-voltage on PWM1 output dis-
ables all outputs and drive the FAULT/RT pin to
VCC.
Over-Voltage Protection
During operation, a short on the upper PWM1
MOSFET (Q1) causes VOUT1 to increase. When
the output exceed the over-voltage threshold of
116% of DACOUT, the FAULT pin is set to fault
latch and turns Q2 on as required in order to regu-
late VOUT1 to 116% of DACOUT. The fault latch
raises the FAULT/RT pin close to VCC potential.
A separate over-voltage circuit provides protection
during the initial application of power. For voltage on
VCC pin below the power-on reset (and above ~4V),
Should VSEN1 exceed 1.0V, the lower MOSFET
(Q2) is driven on as needed to regulate VOUT1 to
1.0V.
Fault Latch
S
R
Q
VCC
Fault
AIC1573
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