PIC18F242 MICROCHIP [Microchip Technology], PIC18F242 Datasheet - Page 31

no-image

PIC18F242

Manufacturer Part Number
PIC18F242
Description
28/40-pin High Performance, Enhanced FLASH Microcontrollers with 10-Bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F242-E/SP
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC18F242-I/SO
Manufacturer:
SKYWORKSS
Quantity:
101
Company:
Part Number:
PIC18F242-I/SO
Quantity:
9
Company:
Part Number:
PIC18F242-I/SP
Quantity:
14
Part Number:
PIC18F2420-E/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC18F2420-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC18F2420-I/SO
Manufacturer:
MICROCHIP
Quantity:
1 560
Part Number:
PIC18F2420-I/SO
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
PIC18F2420-I/SO
0
Part Number:
PIC18F2420-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC18F2423-I/SP
Manufacturer:
MICROCHIP
Quantity:
1 290
Part Number:
PIC18F2423-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC18F242T-I/SO
Manufacturer:
MICROCHIP
Quantity:
3 400
TABLE 3-3:
© 2006 Microchip Technology Inc.
FSR1H
FSR1L
BSR
INDF2
POSTINC2
POSTDEC2
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
TMR0H
TMR0L
T0CON
OSCCON
LVDCON
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0', q = value depends on condition.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
Register
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
4: See Table 3-2 for RESET value for specific condition.
5: Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other
6: Bit 6 of PORTA, LATA and TRISA are not available on all devices. When unimplemented, they are read ’0’.
(4)
Shaded cells indicate conditions do not apply for the designated device.
vector (0008h or 0018h).
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
Oscillator modes, they are disabled and read ’0’.
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
Applicable Devices
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
Brown-out Reset
Power-on Reset,
---- xxxx
xxxx xxxx
---- 0000
---- xxxx
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
---- ---0
--00 0101
---- ---0
0--q 11qq
xxxx xxxx
xxxx xxxx
0-00 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
N/A
N/A
N/A
N/A
N/A
RESET Instruction
MCLR Resets
Stack Resets
---- uuuu
uuuu uuuu
---- 0000
---- uuuu
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
1111 1111
---- ---0
--00 0101
---- ---0
0--q qquu
uuuu uuuu
uuuu uuuu
u-uu uuuu
0000 0000
1111 1111
-000 0000
uuuu uuuu
0000 0000
0000 0000
0000 0000
0000 0000
WDT Reset
N/A
N/A
N/A
N/A
N/A
PIC18FXX2
Wake-up via WDT
or Interrupt
---- uuuu
uuuu uuuu
---- uuuu
---- uuuu
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- ---u
--uu uuuu
---- ---u
u--u qquu
uuuu uuuu
uuuu uuuu
u-uu uuuu
uuuu uuuu
1111 1111
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
DS39564C-page 29
N/A
N/A
N/A
N/A
N/A

Related parts for PIC18F242