PIC18F242 MICROCHIP [Microchip Technology], PIC18F242 Datasheet - Page 109

• Manufacturer Part Number: PIC18F242
• Description: 28/40-pin High Performance, Enhanced FLASH Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

11.0
The Timer1 module timer/counter has the following
features:
• 16-bit timer/counter
• Readable and writable (both registers)
• Internal or external clock select
• Interrupt-on-overflow from FFFFh to 0000h
• RESET from CCP module special event trigger
REGISTER 11-1:
© 2006 Microchip Technology Inc.
(two 8-bit registers; TMR1H and TMR1L)
TIMER1 MODULE
bit 7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
RD16: 16-bit Read/Write Mode Enable bit
1 = Enables register Read/Write of Timer1 in one 16-bit operation
0 = Enables register Read/Write of Timer1 in two 8-bit operations
Unimplemented: Read as '0'
T1CKPS1:T1CKPS0: Timer1 Input Clock Prescale Select bits
11 = 1:8 Prescale value
10 = 1:4 Prescale value
01 = 1:2 Prescale value
00 = 1:1 Prescale value
T1OSCEN: Timer1 Oscillator Enable bit
1 = Timer1 Oscillator is enabled
0 = Timer1 Oscillator is shut-off
T1SYNC: Timer1 External Clock Input Synchronization Select bit
When TMR1CS = 1:
1 = Do not synchronize external clock input
0 = Synchronize external clock input
When TMR1CS = 0:
This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0.
TMR1CS: Timer1 Clock Source Select bit
1 = External clock from pin RC0/T1OSO/T13CKI (on the rising edge)
0 = Internal clock (F
TMR1ON: Timer1 On bit
1 = Enables Timer1
0 = Stops Timer1
Legend:
R = Readable bit
- n = Value at POR
bit 7
T1CON: TIMER1 CONTROL REGISTER
R/W-0
RD16
The oscillator inverter and feedback resistor are turned off to eliminate power drain.
U-0
—
OSC
T1CKPS1
/4)
R/W-0
W = Writable bit
’1’ = Bit is set
T1CKPS0
R/W-0
Figure 11-1 is a simplified block diagram of the Timer1
module.
Register 11-1 details the Timer1 control register. This
register controls the Operating mode of the Timer1
module, and contains the Timer1 oscillator enable bit
(T1OSCEN). Timer1 can be enabled or disabled by
setting or clearing control bit TMR1ON (T1CON<0>).
T1OSCEN
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
T1SYNC
R/W-0
PIC18FXX2
TMR1CS
x = Bit is unknown
R/W-0
DS39564C-page 107
TMR1ON
R/W-0
bit 0