XC73144-12 XILINX [Xilinx, Inc], XC73144-12 Datasheet - Page 4

• Manufacturer Part Number: XC73144-12
• Description: 144-Macrocell CMOS EPLD
• Manufacturer: XILINX [Xilinx, Inc]

XC73144 CMOS EPLD
Slew Rate and Programmable Ground Control
Due to the large number of high current drivers available
on the XC73144, two programmable signal management
features have been included – slew rate control (SRC)
and ground control (GC). Slew rate control is primarily for
external system benefit, to reduce ringing and other cou-
pling phenomenon. SRC permits designers to select
either 1 V/ns or 1.5 V/ns slew rate on a pin-by-pin basis
for any output or I/O signal. This can be done with PLUS-
ASM or schematically, as needed. The defafult slew rate
is 1 V/ns. To assign the pins with equations (PLUSASM),
the designer needs to only declare them as follows:
This will assign the signals in the list to have a 1.5 V/ns
slew rate. Omitting the signal name list will globally set all
signals to be 1.5 V/ns. Specific signals therefore can be
declared with 1 V/ns slew rate as follows:
DC Characteristics Over Recommended Operating Conditions
Power-up/Reset Timing Parameters
Symbol
V
V
I
I
C
C
C
I
Notes: 1. Sample tested
IL
OZ
CC1
OH
OL
IN
IN
OUT
Symbol
t
t
WMR
RESET
2
1
2. Measured with device programmed as eight 16-bit counters
FAST ON <signal name list>
FAST OFF <signal name list>
Parameter
5 V TTL High-level output voltage
3.3 V High-level output voltage
5 V Low-level output voltage
3.3 V Low-level output voltage
Input leakage current
Output high-Z leakage current
Input capacitance for Input and I/O pins
Input capacitance for global control pins
(FCLK0, FCLK1, FCLK2, FOE0, FOE1)
Output capacitance
Supply Current (low power mode)
Master Reset input Low pulse width
Configuration completion time
Parameter
2-68
Schematic control of SRC is also straightforward. Again,
the default is 1 V/ns, but to assign specific pins fast, the
designer need only attach the “FAST” attribute to the I/O
or output buffer or the corresponding pin.
Programmable ground control is useful for internal chip
signal management. The output buffers of the Fast Func-
tion Blocks have an impedance of around 7
switching high to low, where the High Density Function
Blocks impedance is around 14
ance is negligible compared to the impedance of the pin
inductance when output current transients occur, a rea-
sonable ground connection can be made by driving
unused output pins low and physically attaching them to
external ground. The XC73144 architecture permits the
automatic assignment of external ground signals to all
Macrocells that are not declared as primary outputs or
I/Os. Note that the logical function of the buried Macrocell
is fully preserved, while its output driver is driving low and
physically attached to ground. Should designers not wish
to employ programmable ground control, they need only
declare all such pins as primary I/Os whether they will be
attached externally or not.
I
V
I
V
I
I
V
I
V
V
V
V
V
V
f = 1.0 MHz
V
f = 1.0 MHz
V
f = 1.0 MHz
V
V
f = 1.0 MHz @ 25 C
Test Conditions
OH
OH
OL
OL
OL
CC
CC
CC
CC
CC
IN
CC
O
IN
IN
O
IN
CCINT
= GND or V
= GND
= 24 mA (FO)
= 12 mA (I/O)
= 10 mA
= GND or V
= GND
= GND
= V
= -4.0 mA
= -3.2 mA
= Min
= Min
= Min
= Min
= Max
= Max
CC
= V
or GND
CCIO
CCIO
100
Min
CCIO
= 5 V
Typ
80
Min
2.4
2.4
250 Typ
. Since this low imped-
Max
160
10.0
10.0
12.0
20.0
Max
0.5
0.4
8.0
Units
ns
Units
s
mA
pF
pF
pF
V
V
V
V
A
A
when