CY8C54 CYPRESS [Cypress Semiconductor], CY8C54 Datasheet - Page 8

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CY8C54

Manufacturer Part Number
CY8C54
Description
Programmable System-on-Chip (PSoC)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet

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Figure 2-4
example PCB layout, for the 100-pin TQFP part, for optimal
analog performance on a 2-layer board.
Document Number: 001-55036 Rev. *A
The two pins labeled Vddd must be connected together.
The two pins labeled Vccd must be connected together, and
have capacitors connected between them as shown in
and
Figure 2-5
Vssd
Figure 2-4. Example Schematic for 100-Pin TQFP Part with Power Connections
show an example schematic and an
Vddd
Vssd
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Vddd
Vssd
1
2
3
4
5
6
7
8
9
C6
0.1uF
C12
0.1uF
P2[5]
P2[6]
P2[7]
P12[4], SIO
P12[5], SIO
P6[4]
P6[5]
P6[6]
P6[7]
Vssb
Ind
Vboost
Vbat
Vssd
XRES
P5[0]
P5[1]
P5[2]
P5[3]
P1[0], SWIO, TMS
P1[1], SWDIO, TCK
P1[2]
P1[3], SWV, TDO
P1[4], TDI
P1[5], nTRST
Vddd
Vssd
PRELIMINARY
Vddd
Vssd
C16
0.1uF
C1
1uF
Vssd
Vddd
0.1uF
Vssd
C2
C15
1uF
Figure 2-4
the two Vccd pins should be as short as possible.
The two pins labeled Vssd must be connected together.
Vccd
Vssd
PSoC
C3
0.1uF
OA0-, REF0, P0[3]
kHzXout, P15[2]
kHzXin, P15[3]
OA0out, P0[1]
OA2out, P0[0]
OA3out, P3[7]
OA1out, P3[6]
OA0+, P0[2]
and
SIO, P12[3]
SIO, P12[2]
SIO, P12[1]
SIO, P12[0]
®
Vddd
Vssd
Vddio0
U2
5: CY8C54 Family Data Sheet
CY8C55xx
P4[1]
P4[0]
Vdda
Vssd
Vssa
Vcca
Power System
C11
NC
NC
NC
NC
NC
NC
0.1uF
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
Vddd
Vssd
Vssd
Vdda
Vssa
Vcca
C8
0.1uF
C9
1uF
on page 22. The trace between
Vssd
Vssa
Vdda
Vdda
Vssa
C13
C10
1uF
0.1uF
Page 8 of 93
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