CY8C54 CYPRESS [Cypress Semiconductor], CY8C54 Datasheet - Page 72

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CY8C54

Manufacturer Part Number
CY8C54
Description
Programmable System-on-Chip (PSoC)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet

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11.5.11 Programmable Gain Amplifier
The PGA is created using a SC/CT Analog Block, see the PGA component data sheet in PSoC Creator for full AC/DC specifications,
and APIs and example code.
Table 11-35. PGA DC Specifications
Table 11-36. PGA AC Specifications
Document Number: 001-55036 Rev. *A
Vos
DeltaV/DeltaTa Input offset voltage drift
PSRR
Zin
Ge1
Ge2
Ge4
Ge8
Ge16
Ge32
Ge50
Vonl
Voh, Vol
BW1
BW24
BW48
SR1
SR24
SR48
eni1
eni24
eni48
Parameter
Parameter
Input offset voltage
Output current source capability
Power supply rejection ratio
Input impedance
Gain Error
Gain = 1
Gain = 2
Gain = 4
Gain = 8
Gain = 16
Gain = 32
Gain = 50
DC output non linearity G = 1
Output voltage swing
Quiescent current
Gain = 1
Gain = 24
Gain = 48
Slew Rate
Gain = 1
Gain = 24
Gain = 48
Input Noise Voltage Density
Gain = 1
Gain = 24
Gain = 48
-3 db Bandwidth
[9]
[9]
Description
Description
[9]
[9]
[9]
[9]
[9]
PRELIMINARY
[9]
[9]
[9]
[9]
Drive setting 3, Vdda = 1.71V
100 kHz
1 MHz
For non inverting inputs
Non inverting mode, reference = Vssa
Rin of 40K
Rin of 40K
Rin of 40K
Rin of 40K
Rin of 40K
Rin of 40K
Rin of 40K
Noninverting mode, 300 mV ≤ Vin
≤ Vdda - 1.2V, Cl ≤ 25 pF
Noninverting mode, 300 mV ≤ Vin
≤ Vdda - 1.2V, Cl ≤ 25 pF
Noninverting mode, 300 mV ≤ Vin
≤ Vdda - 1.2V, Cl ≤ 25 pF
Vdda = 1.71V 5% to 90% FS output
RC limited
RC limited
10 kHz
10 kHz
10 kHz
Conditions
Conditions
PSoC
®
5: CY8C54 Family Data Sheet
Vssa +
0.15
Min
Min
360
215
0.5
0.5
69
38
35
7
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ
±30
Typ
38
38
38
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Vdda -
±
±
±
Max
0.01
0.15
1.65
Max
250
±
10
0.15
1.03
1.23
±
2.5
±
±
-
-
-
-
-
-
-
-
-
-
-
-
1
5
5
nV/sqrtHz
nV/sqrtHz
nV/sqrtHz
% of FSR
Page 72 of 93
µV/°C
Units
Units
MHz
V/µs
V/µs
V/µs
kHz
kHz
mV
M Ω
mA
µA
dB
dB
%
%
%
%
%
%
%
V
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