PIC17C752 MICROCHIP [Microchip Technology], PIC17C752 Datasheet - Page 214

• Manufacturer Part Number: PIC17C752
• Description: High-Performance 8-Bit CMOS EPROM Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

TABLRD
Example1:
Example2:
DS30264A-page 214
Before Instruction
After Instruction (table write completion)
Before Instruction
After Instruction (table write completion)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
Table Read
TABLRD
TABLRD
1, 1, REG ;
0, 0, REG ;
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
0x53
0xAA
0x55
0xA356
0x1234
0xAA
0x12
0x34
0xA357
0x5678
0x53
0xAA
0x55
0xA356
0x1234
0x55
0x12
0x34
0xA356
0x1234
TABLWT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Note:
operation
Decode
Q1
No
The MCLR/V
voltage for successful programming of internal
memory.
If MCLR/V
the programming sequence of internal memory
will be interrupted. A short write will occur (2 T
The internal memory location will not be affected.
(Table Pointer
on Address
register 'f'
operation
PP
Table Write
[ label ] TABLWT t,i,f
0
i
t
If t = 0,
If t = 1,
(TBLPTR);
If i = 1,
None
1.
2.
3.
1
2 (many if write is to on-chip
EPROM program memory)
Read
bus)
Q2
No
1010
PP
= V
f
f
TBLAT
TBLPTR + 1
[0,1]
[0,1]
f
Load value in ’f’ into 16-bit table
latch (TBLAT)
If t = 0: load into low byte;
If t = 1: load into high byte
The contents of TBLAT is written
to the program memory location
pointed to by TBLPTR
If TBLPTR points to external
program memory location, then
the instruction takes two-cycle
If TBLPTR points to an internal
EPROM
instruction is terminated when
an interrupt is received.
The TBLPTR can be automati-
cally incremented
If i = 0; TBLPTR is not
If i = 1; TBLPTR is incremented
pin must be at the programming
DD
1997 Microchip Technology Inc.
255
TBLATL;
TBLATH;
11ti
operation
Process
incremented
Data
Prog Mem
Q3
No
location,
TBLPTR
ffff
(Table Latch on
WR goes low)
Address bus,
TBLATH or
operation
then
TBLATL
register
Write
Q4
No
ffff
the
CY
).