PIC17C752 MICROCHIP [Microchip Technology], PIC17C752 Datasheet - Page 172

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PIC17C752

Manufacturer Part Number
PIC17C752
Description
High-Performance 8-Bit CMOS EPROM Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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16.3
The ADCON1, and DDR registers control the operation
of the A/D port pins. The port pins that are desired as
analog inputs must have their corresponding DDR bits
set (input). If the DDR bit is cleared (output), the digital
output level (V
The A/D operation is independent of the state of the
CHS2:CHS0 bits and the DDR bits.
EXAMPLE 16-2: A/D CONVERSION
DS30264A-page 172
;
;
;
;
Note 1: When reading the port register, any pin
Note 2: Analog levels on any pin that is defined as
Ensure that the required sampling time for the selected input channel has elapsed.
Then the conversion may be started.
MOVLB
CLRF
MOVLW
MOVWF
MOVLB
BCF
BSF
BSF
BCF
MOVLB
BSF
Configuring Analog Port Pins
:
:
configured as an analog input channel will
read as cleared (a low level). Pins config-
ured as digital inputs, will convert an ana-
log input. Analog levels on a digitally
configured input will not affect the conver-
sion accuracy.
a digital input (including the AN11:AN0
pins), may cause the input buffer to con-
sume current that is out of the devices
specification.
OH
5
ADCON1, F
0xC1
ADCON0
4
PIR2, ADIF
PIE2, ADIE
INTSTA, PEIE
CPUSTA, GLINTD
5
ADCON0, GO
or V
OL
) will be converted.
; Bank 5
; Configure A/D inputs
; RC Clock, A/D is on, Channel 0 is selected
;
; Bank 4
; Clear A/D interrupt flag bit
; Enable A/D interrupts
; Enable peripheral interrupts
; Enable all interrupts
; Bank 5
; Start A/D Conversion
;
;
The ADIF bit will be set and the GO/DONE bit
is cleared upon completion of the A/D Conversion
Preliminary
16.4
Example 16-2 shows how to perform an A/D conver-
sion. The PORTF and lower four PORTG pins are con-
figured as analog inputs. The analog references
(V
A/D interrupt is enabled, and the A/D conversion clock
is F
pin (channel 0).
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D result register
pair will NOT be updated with the partially completed
A/D
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers). After
the A/D conversion is aborted, a 2T
before the next acquisition is started. After this 2T
wait, acquisition on the selected channel is automati-
cally started.
REF
Note:
RC
+ and V
. The conversion is performed on the RG3/AN0
conversion
A/D Conversions
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
REF
-) are the device AV
sample.
1997 Microchip Technology Inc.
That
AD
DD
wait is required
and AV
is,
SS
. The
the
AD

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