PIC12F1516 MICROCHIP [Microchip Technology], PIC12F1516 Datasheet - Page 176

• Manufacturer Part Number: PIC12F1516
• Description: 28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC16(L)F1516/7/8/9
20.1
The Capture mode function described in this section is
available and identical for all CCP modules.
Capture mode makes use of the 16-bit Timer1
resource. When an event occurs on the CCPx pin, the
16-bit CCPRxH:CCPRxL register pair captures and
stores the 16-bit value of the TMR1H:TMR1L register
pair, respectively. An event is defined as one of the
following and is configured by the CCPxM<3:0> bits of
the CCPxCON register:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
When a capture is made, the Interrupt Request Flag bit
CCPxIF of the PIRx register is set. The interrupt flag
must be cleared in software. If another capture occurs
before the value in the CCPRxH, CCPRxL register pair
is read, the old captured value is overwritten by the new
captured value.
Figure 20-1
operation.
20.1.1
In Capture mode, the CCPx pin should be configured
as an input by setting the associated TRIS control bit.
Also, the CCP2 pin function can be moved to
alternative pins using the APFCON register. Refer to
Section Register 12-1: “APFCON: Alternate Pin
Function Control Register”
FIGURE 20-1:
DS41452B-page 176
CCPx
pin
Note:
System Clock (F
Capture Mode
Edge Detect
CCP PIN CONFIGURATION
If the CCPx pin is configured as an output,
a write to the port can cause a capture
condition.
Prescaler
 1, 4, 16
shows a simplified diagram of the Capture
and
CCPxM<3:0>
OSC
)
Set Flag bit CCPxIF
(PIRx register)
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
for more details.
Capture
Enable
CCPRxH
TMR1H
CCPRxL
TMR1L
Preliminary
20.1.2
Timer1 must be running in Timer mode or Synchronized
Counter mode for the CCP module to use the capture
feature. In Asynchronous Counter mode, the capture
operation may not work.
See
Control”
20.1.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit of the PIEx register clear to
avoid false interrupts. Additionally, the user should
clear the CCPxIF interrupt flag bit of the PIRx register
following any change in Operating mode.
20.1.4
There are four prescaler settings specified by the
CCPxM<3:0> bits of the CCPxCON register. Whenever
the CCP module is turned off, or the CCP module is not
in Capture mode, the prescaler counter is cleared. Any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another does not
clear the prescaler and may generate a false interrupt. To
avoid this unexpected operation, turn the module off by
clearing the CCPxCON register before changing the
prescaler.
perform this function.
EXAMPLE 20-1:
BANKSEL CCPxCON
CLRF
MOVLW
MOVWF
Section 18.0 “Timer1 Module with Gate
for more information on configuring Timer1.
CCPxCON
NEW_CAPT_PS ;Load the W reg with
CCPxCON
Equation 20-1
TIMER1 MODE RESOURCE
SOFTWARE INTERRUPT MODE
CCP PRESCALER
CHANGING BETWEEN
CAPTURE PRESCALERS
;Set Bank bits to point
;to CCPxCON
;Turn CCP module off
;the new prescaler
;move value and CCP ON
;Load CCPxCON with this
;value
 2011 Microchip Technology Inc.
demonstrates the code to