STA2500DTR STMICROELECTRONICS [STMicroelectronics], STA2500DTR Datasheet - Page 43

• Manufacturer Part Number: STA2500DTR
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STA2500D
7.3
Figure 18. SPI setup and hold timing
Table 26.
The PCM interface
The chip contains a 4-pin direct voice interface to connect to standard CODEC.
The interface supports multiport PCM operations for voice transfer. It can be programmed to
act as a Master or a Slave via a SW parameter download or via specific HCI commands.
The four signals of the multi-port PCM interface are:
●
●
●
●
As a Master the interface by default generates a PCM clock rate of 2048 kHz, but it can be
configured to rates from 8 kHz up to 2048 kHz. As a Slave, it can automatically handle
external PCM clock rates from 128 kHz up to 4000 kHz. The default PCM_SYNC rate is 8
kHz.
The following external PCM data format are supported: linear (13 - 16 bit), µ−law (8 bit) or A-
law (8 bit).
Symbol
T
T
T
T
T
T
T
T
T
P
SCLD
CSH
SDC
HCD
CLH
CSL
SCS
SCL
CLL
CL
PCM_CLK
PCM_SYNC : PCM 8 kHz sync (every 125 μs)
PCM_A
PCM_B
SPI_CLK full period
High period of SPI_CLK
Low period of SPI_CLK
High period of SPI_CSN
Low period of SPI_CSN
Setup time, SPI_CSN Low to SPI_CLK high
Setup time, SPI_CLK Low to SPI_CSN high
Setup time, SPI_MOSI valid to SPI_CLK high
Hold time, SPI_MOSI valid after SPI_CLK
high
Setup time, SPI_CLK Low to SPI_MISO valid
SPI timing parameters
: PCM clock
: PCM data (TX or RX)
: PCM data (RX or TX)
S PI_C SN
SPI_CLK
S PI_D I
S PI_D O
Description
Doc ID 16067 Rev 1
T
S CS
T
SC LD
T
T
CLL
P
T
C SL
CL
SDC
1
1 * P
1 * P
9 * P
T
/
T
2
CLH
Min.
16.6
26.4
HCD
9.7
70
* P
0
CL
CL
CL
CL
T
S CL
T
CSH
Typ.
0
5
Digital interfaces
Max.
26.5
0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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