STA2500DTR STMICROELECTRONICS [STMicroelectronics], STA2500DTR Datasheet - Page 27

• Manufacturer Part Number: STA2500DTR
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STA2500D
6.5
6.6
6.7
6.8
System clock
The STA2500D works with a sine wave or digital clock provided on the BT_REF_CLK_IN
pin. Detailed specifications are found in
Low power clock
The low power clock is used by the Bluetooth Controller as reference clock during the low
power modes. It requires an accuracy of +250 ppm. The STA2500D requires a digital clock
to be provided on the BT_LP_CLK pin, with frequencies of 3.2 kHz, 32 kHz and 32.768 kHz.
After power-up, the low power clock must be available before the reset is released. It must
remain active all the time until the STA2500D is powered off.
Clock detection
An integrated automatic detection algorithm detects the system and low power clock
frequencies after a hardware reset. The steps in the clock detection routine are:
●
●
Clock request signals
To allow minimum power consumption, a clock request feature is available so that the
system clock (BT_REF_CLK_IN) can be stopped when not needed by the Bluetooth
system. The clock request signal can be active high or active low, and the STA2500D
supports internal propagation of clock request signal coming from another device in the
system.
Different configurations as described below are supported immediately after reset and in all
Bluetooth operation modes, provided that BT_VIO_A is available.
The clock request functionality is based on four different signals: BT_CLK_REQ_OUT_1,
BT_CLK_REQ_OUT_2, BT_CLK_REQ_IN_1, BT_CLK_REQ_IN_2, with the following
function:
●
●
●
●
The following modes are supported:
●
Identification of the system clock frequency (9.6 MHz, 10 MHz, 13 MHz, 16 MHz,
16.8MHz, 19.2 MHz, 26 MHz, 33.6 MHz or 38.4 MHz)
Identification of the low power clock (3.2 kHz, 32.768 kHz or 32 kHz).
BT_CLK_REQ_OUT_1: active low or high clock request, depending on HW
configuration pins (Table ). Support for either push-pull or open drain output.
BT_CLK_REQ_OUT_2: active low clock request, only used in combination with SPI
mode. Support for either push-pull or open drain output.
BT_CLK_REQ_IN_1: active high clock request input from an other device, depending
on HW configuration pin.
BT_CLK_REQ_IN_2: active low clock request input from an other device.
Active high clock request input and output combined with UART or SPI:
Doc ID 16067 Rev 1
Section
2.4.
General specification
27/57