ATAM893X-TKHYZ ATMEL [ATMEL Corporation], ATAM893X-TKHYZ Datasheet - Page 34

• Manufacturer Part Number: ATAM893X-TKHYZ
• Description: Flash Version for ATAR080, ATAR090/890 and ATAR092/892
• Manufacturer: ATMEL [ATMEL Corporation]

5.3.1.1
34
ATAM893-D
Timer 1 Control Register 1 (T1C1)
Bit 3 = MSB, Bit 0 = LSB
The three bits T1C[2:0] select the divider for timer 1. The resulting time interval depends on this
divider and the timer 1 input clock source. The timer input can be supplied by the system clock,
the 32-kHz oscillator or via the clock management. If the clock management generates the
SUBCL, the selected input clock from the RC oscillator, 4-MHz oscillator or an external clock is
divided by 16.
Table 5-6.
T1C2
T1C1
T1RM
T1C2
T1C1
T1C0
0
0
0
0
1
1
1
1
T1C1
0
0
1
1
0
0
1
1
Bit 3
T1RM
Timer 1 Restart Mode
Note: if WDL = 0, Timer 1 restart is impossible
Timer 1 Control bit 2
Timer 1 Control bit 1
Timer 1 Control bit 0
Timer 1 Control Bits
T1C0
0
1
0
1
0
1
0
1
Bit 2
T1C2
Divider
16384
2048
256
16
32
2
4
8
Bit 1
T1C1
Time Interval with
T1RM = 0, write access without Timer 1 restart
T1RM = 1, write access with Timer 1 restart
SUBCL/16384
SUBCL/2048
SUBCL/256
SUBCL/16
SUBCL/32
SUBCL/2
SUBCL/4
SUBCL/8
SUBCL
Bit 0
T1C0
Address: '7'hex - Subaddress: '8'hex
Reset value: 1111b
Time Interval with
SUBCL = 32 kHz
0.977 ms
7.812 ms
62.5 ms
500 ms
122 µs
244 µs
488 µs
61 µs
Time Interval with
SYSCL = 2/1 MHz
8192 µs/16384 µs
1024 µs/2048 µs
128 µs/256 µs
4680C–4BMCU–01/05
16 µs/32 µs
8 µs/16 µs
1 µs/2 µs
2 µs/4 µs
4 µs/8 µs