SAA7103 PHILIPS [NXP Semiconductors], SAA7103 Datasheet - Page 43

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SAA7103

Manufacturer Part Number
SAA7103
Description
Digital video encoder
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Philips Semiconductors
Table 42 Subaddress 1BH
Table 43 Subaddresses 26H and 27H
Table 44 Subaddress 28H
Table 45 Subaddress 29H
2001 Sep 25
MSM
RCOMP
(read only)
GCOMP
(read only)
BCOMP
(read only)
WSS
WSSON
BS
SRES
BE
DATA BYTE
DATA BYTE
DATA BYTE
DATA BYTE
Digital video encoder
LEVEL
LEVEL
LEVEL
LOGIC
LOGIC
LOGIC
LOGIC
LEVEL
0
1
0
1
0
1
0
1
0
1
0
1
monitor sense mode off; RCOMP, GCOMP and BCOMP bits are not valid; default after reset
monitor sense mode on
check comparator at DAC on pin 27 is active, output is loaded
check comparator at DAC on pin 27 is inactive, output is not loaded
check comparator at DAC on pin 28 is active, output is loaded
check comparator at DAC on pin 28 is inactive, output is not loaded
check comparator at DAC on pin 30 is active, output is loaded
check comparator at DAC on pin 30 is inactive, output is not loaded
wide screen signalling bits
wide screen signalling output is disabled; default after reset
wide screen signalling output is enabled
starting point of burst in clock cycles
pin 23 accepts a teletext bit stream (TTX)
pin 23 accepts a sync reset input (SRES)
ending point of burst in clock cycles
3 to 0 = aspect ratio
7 to 4 = enhanced services
10 to 8 = subtitles
13 to 11 = reserved
DESCRIPTION
DESCRIPTION
43
DESCRIPTION
DESCRIPTION
PAL: BS = 33 (21H); default after reset if
strapping pin 13 tied to HIGH
NTSC: BS = 25 (19H); default after reset if
strapping pin 13 tied to LOW
default after reset
a HIGH impulse resets synchronization of the
encoder (first field, first line)
PAL: BE = 29 (1DH); default after reset if
strapping pin 13 tied to HIGH
NTSC: BE = 29 (1DH); default after reset if
strapping pin 13 tied to LOW
SAA7102; SAA7103
REMARKS
REMARKS
Product specification

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