DAC1201D125HL NXP [NXP Semiconductors], DAC1201D125HL Datasheet - Page 19

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DAC1201D125HL

Manufacturer Part Number
DAC1201D125HL
Description
Dual 12-bit DAC, up to 125 Msps
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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NXP Semiconductors
DAC1201D125_1
Product data sheet
10.6 Gain control
10.7 Analog outputs
An external reference can also be used for applications requiring higher accuracy or
precise current adjustment. Due to the high input impedance of pin REFIO, applying an
external source disables the band gap.
Table 8
Table 8.
In Independent gain mode, both full-scale currents can be adjusted independently using
resistors R
In Common gain mode, both full-scale currents are adjusted with the same resistor and
divided by two in both DACs.
See
combination of PMOS current sources and associated switches for each segment.
Cascode source configuration enables the output impedance of the source to be
increased, thus improving the dynamic performance by reducing distortion.
The DAC1201D125 can be used with either:
A typical configuration is to use a 1 V p-p level on each output IOUTAP/IOUTBP and
IOUTAN/IOUTBN. Several combinations can be used but they must respect the voltage
compliance range.
GAINCTRL
LOW
HIGH
Fig 20. Equivalent analog output circuit
a differential output, coupled to a transformer (or operational amplifier) to reduce
even-order harmonics and noise
a single-ended output for applications requiring unipolar voltage
Figure 20
shows how to select the different gain control modes.
Gain control
A
on pin AVIRES and R
Mode
independent gain control
common gain control
for the analog output circuit of one DAC. This circuit consists of a parallel
Rev. 01 — 27 November 2008
B
on pin BVIRES.
DAC A
full-scale control
AVIRES
AVIRES
IOUTAP/IOUTBP
IOUTAN/IOUTBN
AGND
R L
Dual 12-bit DAC, up to 125 Msps
001aai821
AGND
DAC1201D125
R L
DAC B
full-scale control
BVIRES
AVIRES
© NXP B.V. 2008. All rights reserved.
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