PCA9674AD NXP [NXP Semiconductors], PCA9674AD Datasheet - Page 13
![no-image](/images/no-image-200.jpg)
PCA9674AD
Manufacturer Part Number
PCA9674AD
Description
Remote 8-bit I/O expander for Fm+ I2C-bus with interrupt
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA9674AD.pdf
(32 pages)
NXP Semiconductors
8. I/O programming
PCA9674_PCA9674A_5
Product data sheet
8.1 Quasi-bidirectional I/O architecture
8.2 Writing to the port (Output mode)
The PCA9674/74A’s 8 ports (see
either as input or output ports. Input data is transferred from the ports to the
microcontroller in the Read mode (see
in the Write mode (see
This quasi-bidirectional I/O can be used as an input or output without the use of a control
signal for data directions. At power-on the I/Os are HIGH. In this mode only a current
source (I
edges into heavily loaded outputs. These devices turn on when an output is written HIGH,
and are switched off by the negative edge of SCL. The I/Os should be HIGH before being
used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as
inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the
write mode.
Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large
current (I
To write, the master (microcontroller) first addresses the slave device. By setting the last
bit of the byte containing the slave address to logic 0 the write mode is entered. The
PCA9674/74A acknowledges and the master sends the data byte for P7 to P0 and is
acknowledged by the PCA9674/74A. The 8-bit data is presented on the port lines after it
has been acknowledged by the PCA9674/74A.
The number of data bytes that can be sent successively is not limited. The previous data
is overwritten every time a data byte has been sent.
Fig 12. Device ID field reading
S
START condition
manufacturer name
M7
= 00000000
1
OH
M6 M5 M4
OL
device ID address
If more than 2 bytes are read, the slave device loops back to the first byte (manufacturer byte) and
keeps sending data until the master generates a ‘no acknowledge’.
1
) to V
) will flow to V
1
1
DD
M3
1
is active. An additional strong pull-up to V
M2 M1 M0
0
Rev. 05 — 15 June 2009
Figure
0
SS
R/W
0
.
Remote 8-bit I/O expander for Fm+ I
A
A
acknowledge from one
or several slave(s)
acknowledge
from master
13).
C6
A6
the device to be identified
I
2
Figure
category identification
C-bus slave address of
A5 A4 A3 A2 A1 A0 X
C5 C4 C3
= 0000001
Figure
2) are entirely independent and can be used
C2
14). Output data is transmitted to the ports
C1 C0 F5
don't care
feature identification
acknowledge from
slave to be identified
A
A
acknowledge
from master
= 001011
F4
1
PCA9674/74A
P3 P2 P1
DD
device ID address
1
(I
1
trt(pu)
2
1
C-bus with interrupt
slave to be identified
P0 R2 R1 R0
1
) allows fast rising
acknowledge from
© NXP B.V. 2009. All rights reserved.
revision = 000
no acknowledge
0
from master
0
R/W
1
condition
002aac119
STOP
A
A
13 of 32
P