PCA9674AD NXP [NXP Semiconductors], PCA9674AD Datasheet
PCA9674AD
Related parts for PCA9674AD
PCA9674AD Summary of contents
Page 1
PCA9674/74A Remote 8-bit I/O expander for Fm+ I Rev. 05 — 15 June 2009 1. General description The PCA9674/74A provide general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I Fast-mode Plus (Fm+) family. The ...
Page 2
... Instrumentation and test measurement 4. Ordering information Table 1. Ordering information Type number Topside mark PCA9674BS 674 PCA9674ABS 74A PCA9674D PCA9674D PCA9674AD PCA9674AD PCA9674PW PCA9674 PCA9674APW PA9674A PCA9674TS PCA9674 PCA9674ATS PA9674A PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm+ I Package Name Description HVQFN16 plastic thermal enhanced very thin quad fl ...
Page 3
NXP Semiconductors 5. Block diagram INT AD0 AD1 AD2 SCL SDA Fig 1. data from Shift Register data to Shift Register Fig 2. PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm+ I PCA9674 PCA9674A ...
Page 4
... V DD AD0 AD1 n.c. AD2 P0 Fig 5. PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm SDA 3 14 SCL PCA9674D INT PCA9674AD 002aac111 Pin configuration for SO16 ...
Page 5
NXP Semiconductors 6.2 Pin description Table 2. Symbol AD0 AD1 AD2 INT SCL SDA V DD Table 3. Symbol INT SCL n.c. SDA V DD AD0 AD1 n.c. AD2 P0 ...
Page 6
NXP Semiconductors Table 4. Symbol AD2 [ INT SCL SDA V DD AD0 AD1 [1] HVQFN16 package die supply ground is connected to both the and board-level ...
Page 7
NXP Semiconductors Fig 7. The last bit of the first byte defines the operation to be performed. When set to logic 1 a read is selected, while a logic 0 selects a write operation. When AD2, AD1 and AD0 are ...
Page 8
NXP Semiconductors Table 5. AD2 SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL ...
Page 9
NXP Semiconductors Table 6. AD2 ...
Page 10
NXP Semiconductors Table 6. AD2 SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA [1] The PCA9674A does not acknowledge when AD2, AD1, AD0 follows ...
Page 11
NXP Semiconductors Fig 9. 7.2.1 Software Reset The Software Reset Call allows all the devices in the I state value through a specific formatted I implies that the I The Software Reset sequence is defined as following START ...
Page 12
NXP Semiconductors 7.2.2 Device ID (PCA9674/74A ID field) The Device ID field is a 3-byte read-only (24 bits) word giving the following information: • 8 bits with the manufacturer name, unique per manufacturer (for example, NXP). • 13 bits with ...
Page 13
NXP Semiconductors S 1 START condition M7 manufacturer name = 00000000 Fig 12. Device ID field reading 8. I/O programming 8.1 Quasi-bidirectional I/O architecture The PCA9674/74A’s 8 ports (see either as input or output ports. Input data is transferred from ...
Page 14
NXP Semiconductors SCL slave address SDA START condition write to port data output from port P5 output voltage P5 pull-up output current INT Fig 13. ...
Page 15
NXP Semiconductors 8.4 Power-on reset When power is applied to V PCA9674/74A in a reset condition until V condition is released and the PCA9674/74A registers and I will initialize to their default states. Thereafter V the device. 8.5 Interrupt output ...
Page 16
NXP Semiconductors 9. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be ...
Page 17
NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 18. System configuration 9.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed ...
Page 18
NXP Semiconductors 10. Application design-in information 10.1 Bidirectional I/O expander applications In the 8-bit I/O expander application shown in P7 are outputs. When used in this configuration, during a write, the input (P0 and P1) must be written as HIGH ...
Page 19
NXP Semiconductors 11. Limiting values Table 7. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol tot P/out T stg T amb [1] Total package ...
Page 20
NXP Semiconductors 12. Static characteristics Table 8. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current DD I standby current stb V power-on ...
Page 21
NXP Semiconductors 13. Dynamic characteristics Table 9. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a BUF STOP and START ...
Page 22
NXP Semiconductors START protocol condition (S) t SU;STA SCL t BUF SDA t HD;STA Rise and fall times refer Fig 22. I C-bus timing diagram PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm+ I bit ...
Page 23
NXP Semiconductors 14. Package outline HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS ...
Page 24
NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. ...
Page 25
NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...
Page 26
NXP Semiconductors SSOP20: plastic shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.4 mm 1.5 ...
Page 27
NXP Semiconductors 15. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 16. Soldering of SMD packages ...
Page 28
NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities ...
Page 29
NXP Semiconductors Fig 27. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 17. Abbreviations Table 12. Acronym CDM ESD GPIO HBM LED IC 2 ...
Page 30
NXP Semiconductors 18. Revision history Table 13. Revision history Document ID Release date PCA9674_PCA9674A_5 20090615 • Modifications: Table 8 “Static – – PCA9674_PCA9674A_4 20090303 PCA9674_PCA9674A_3 20070907 PCA9674_PCA9674A_2 20061012 PCA9674_PCA9674A_1 20060905 PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm+ ...
Page 31
NXP Semiconductors 19. Legal information 19.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
Page 32
NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...