TDA9898HL/V3 NXP [NXP Semiconductors], TDA9898HL/V3 Datasheet - Page 36
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TDA9898HL/V3
Manufacturer Part Number
TDA9898HL/V3
Description
Multistandard hybrid IF processing
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.TDA9898HLV3.pdf
(103 pages)
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NXP Semiconductors
TDA9897_TDA9898_4
Product data sheet
Table 41.
Table 42.
Bit
7
6
5
4
3
2
1
0
FEATURE AVIDRED
7
W8 - data write register bit allocation
W8 - data write register bit description
Symbol
FEATURE feature enable
AVIDRED
MODEP3
TAGCIN3
FORCESP VIF AGC and SIF AGC fast mode activation; modulation setting
PORT3
PORT2
-
6
Description
automatic reduction of internal video level for PC / SC < 11.0 dB
port 3 mode selection; pin PORT3
TAGC IF input selection; feature enable set to enable (W8[7] = 1)
(W2[7] = 0)
output state; feature enable set to enable (W8[7] = 1); port 3 mode
selection set to logic output port (W8[5] = 1)
output state; feature enable set to enable (W8[7] = 1)
0 = fixed value
Rev. 04 — 25 May 2009
MODEP3
1 = feature PORT2; PORT3 monitor output of TAGC voltage and data
write register W11[7:0] enabled
0 = feature disabled; pin PORT2 and pin PORT3 set to high-ohmic;
data write register W11[7:0] = 0000 0000
1 = enabled
0 = disabled
1 = logic output port; level controlled by bit PORT3 (W8[2])
0 = monitor output of TAGC voltage
1 = IF3A and IF3B input
0 = IF1A and IF1B input or IF2A and IF2B input depends on VIF input
selection (W4[0])
1 = forced
0 = automatic; dependent on video level
1 = output port is HIGH (external pull-up resistor needed)
0 = output port is LOW
1 = output port is HIGH (external pull-up resistor needed)
0 = output port is LOW
5
TAGCIN3
4
FORCESP
TDA9897; TDA9898
3
Multistandard hybrid IF processing
PORT3
2
PORT2
© NXP B.V. 2009. All rights reserved.
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