TDA9898HL/V3 NXP [NXP Semiconductors], TDA9898HL/V3 Datasheet - Page 18
![no-image](/images/no-image-200.jpg)
TDA9898HL/V3
Manufacturer Part Number
TDA9898HL/V3
Description
Multistandard hybrid IF processing
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.TDA9898HLV3.pdf
(103 pages)
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NXP Semiconductors
9. I
TDA9897_TDA9898_4
Product data sheet
2
C-bus control
8.10 I
8.9 Synthesizer
The synthesizer supports SIF/DIF frequency conversion. A large set of synthesizer
frequencies in steps of 0.5 MHz enables flexible combination of SAW filter and required
conversion frequency.
Synthesizer loop internally adapted to divider ratio range for optimum phase noise
requirement (loop bandwidth).
Synthesizer reference either via 4 MHz crystal or via an external source. Individual pins
for crystal and external reference allows optimum interface definition and supports use of
custom reference frequency offset.
Four different I
I
Read-out functions as TDA9887 plus additional read out of VIF AGC and VIFLOCK,
BLCKLEV and TAGC status.
Table 4.
Table 5.
For MAD activation via pin ADRSEL: see
Slave address
MAD1
MAD2
MAD3
MAD4
Slave address
Name
MAD1
MAD2
MAD3
MAD4
2
2
C-bus transceiver input ports can handle three different I
C-bus transceiver and slave address
Value
43h
42h
4Bh
4Ah
Slave address detection
Slave addresses
2
C-bus device addresses to enable application with multi-IC use.
Bit
A6
1
1
1
1
Rev. 04 — 25 May 2009
Selectable address bit
A3
0
0
1
1
A5
0
0
0
0
Table
A4
0
0
0
0
4.
A0
1
0
1
0
TDA9897; TDA9898
A3
0
0
1
1
Multistandard hybrid IF processing
2
C-bus voltages.
A2
0
0
0
0
Pin ADRSEL
GND
V
resistor to GND
resistor to V
P
A1
1
1
1
1
© NXP B.V. 2009. All rights reserved.
P
A0
1
0
1
0
18 of 103
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