TDA9550 PHILIPS [NXP Semiconductors], TDA9550 Datasheet - Page 64

• Manufacturer Part Number: TDA9550
• Description: TV signal processor-Teletext decoder with embedded m-Controller
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
It is possible to use the deemphasis pin as additional audio
input. In that case the internal signal must, of course, be
switched off. This can be realised by means of the sound
mute bit (SM in subaddress 29H). When the IF circuit is
switched to positive modulation the internal signal on the
deemphasis pin is automatically muted.
CVBS and Y/C input signal selection
The circuit has 2 inputs for external CVBS signals and one
input can also be used as one Y/C input (see Fig. 27).
It is possible to supply the selected CVBS signal to the
demodulated IF video output pin. This mode is selected by
means of the SVO bit in subaddress 22H. The vision IF
amplifier is switched off in this mode.
Synchronisation circuit
The IC contains separator circuits for the horizontal and
vertical sync pulses and a data-slicing circuit which
extracts the digital teletext data from the analog signal.
The horizontal drive signal is obtained from an internal
VCO which is running at a frequency of 25 MHz. This
oscillator is stabilised to this frequency by using a 12 MHz
signal coming from the reference oscillator of the
The horizontal drive is switched on and off via the soft
start/stop procedure. This function is realised by means of
variation of the T
addition the horizontal drive circuit has a ‘low-power
start-up’ function.
2000 Jun 22
-Controller/Teletext decoder.
TV signal processor-Teletext decoder with
embedded -Controller
VIDEO IDENT
IDENT
ON
of the horizontal drive pulses. In
Fig.27 CVBS switch and interfacing of video ident
VIM
CVBS1
CVBS2/Y
64
The video ident circuit can be connected to the incoming
‘internal’ video signal or to the selected signal. This ident
circuit is independent of the synchronisation and can be
used to switch the time-constant of the horizontal PLL
depending on the presence of a video signal (via the VID
bit). In this way a very stable OSD can be realised.
The subcarrier output is combined with a 3-level output
switch (0 V, 2.3 V and 4.5 V). The output level and the
availability of the subcarrier signal is controlled by the
CMB1 and CMB0 bits. The output can be used to switch
sound traps etc. It is also possible to use this pin for the
connection of the AVL capacitor or as AM output.
The vertical synchronisation is realised by means of a
divider circuit. The vertical ramp generator needs an
external resistor and capacitor. For the vertical drive a
differential output current is available. The outputs must be
DC coupled to the vertical output stage.
In the types which are intended for 90 picture tubes the
following geometry parameters can be adjusted:
Horizontal shift
Vertical amplitude
Vertical slope
S-correction
Vertical shift
C
TDA955X/6X/8X PS/N1 series
TO CHROMA PROCESSING
TO LUMA/SYNC PROCESSING
Tentative Device Specification
SVO
IFVO/SVO
(+)
IFVO