TDA9550 PHILIPS [NXP Semiconductors], TDA9550 Datasheet - Page 18

• Manufacturer Part Number: TDA9550
• Description: TV signal processor-Teletext decoder with embedded m-Controller
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Table 3 SFR Bit description
2000 Jun 22
IEN1
IP
IP1
P0
P1
P2
P3
P0CFGA
P0CFGB
P1CFGA
P1CFGB
TV signal processor-Teletext decoder with
embedded -Controller
P0CFGB<x>/P0CFGA<x> = 00
P0CFGB<x>/P0CFGA<x> = 01
P0CFGB<x>/P0CFGA<x> = 10
P0CFGB<x>/P0CFGA<x> = 11
Names
P0<6:5>
P1<7:6>
P1<3:0>
P2<6:0>
P3<3:0>
PBUSY
PES2
PCC
EX1
EX0
ET1
ET0
ET2
PX1
PX0
PT1
PT0
PT2
Enable Timer 1 Interrupt.
Enable External Interrupt 1.
Enable Timer 0 Interrupt.
Enable External Interrupt 0.
Enable Timer 2 Interrupt.
Priority EBUSY Interrupt.
Priority ES2 Interrupt.
Priority ECC Interrupt.
Priority Timer 1 Interrupt.
Priority External Interrupt 1.
Priority Timer 0 Interrupt.
Priority External Interrupt 0.
Priority Timer 2 Interrupt.
Port 0 I/O register connected to external pins.
Port 1 I/O register connected to external pins.
Port 1 I/O register connected to external pins.
Port 2 I/O register connected to external pins.
Port 3 I/O register connected to external pins.
P1CFGA<7>
P1CFGB<7>
Reserved
Reserved
Reserved
Reserved
Reserved
P1<7>
BIT7
0
-
-
MODE 0 Open Drain.
MODE 1 Quasi Bi-Directional.
MODE2 High Impedance.
MODE3 Push Pull.
P0CFGA<6>
P1CFGA<6>
P0CFGB<6>
P1CFGB<6>
Reserved
PBUSY
P0<6>
P1<6>
P2<6>
BIT6
-
-
P0CFGA<5>
P0CFGB<5>
Reserved
Reserved
Reserved
Reserved
P0<5>
P2<5>
BIT5
PES2
-
-
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
P2<4>
BIT4
PCC
-
-
18
P1CFGA<3>
P1CFGB<3>
Reserved
Reserved
Reserved
P1<3>
P2<3>
P3<3>
BIT3
PT1
-
-
TDA955X/6X/8X PS/N1 series
P1CFGA<2>
P1CFGB<2>
Reserved
Reserved
Reserved
P1<2>
P2<2>
P3<2>
BIT2
PX1
-
-
P1CFGA<1>
P1CFGB<1>
Reserved
Reserved
Reserved
P1<1>
P2<1>
P3<1>
BIT1
PT0
Tentative Device Specification
-
-
P1CFGA<0>
P1CFGB<0>
Reserved
Reserved
Reserved
P1<0>
P2<0>
P3<0>
BIT0
ET2
PX0
PT2
RESET
FFH
FFH
FFH
FFH
FFH
FFH
00H
00H
00H
00H
00H