TDA8003TS/C1 PHILIPS [NXP Semiconductors], TDA8003TS/C1 Datasheet - Page 10

• Manufacturer Part Number: TDA8003TS/C1
• Description: I2C-bus SIM card interface
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Clock circuit
The clock to the card is either derived from pin SIMCLK
(2 to 20 MHz) or from the internal oscillator.
During a card session, f
1
For the card Sleep mode, CLK may be chosen stop LOW,
stop HIGH or
CLKPD2. This predefined value will be applied to CLK
when bit PDOWN is set to logic 1.
The first CLK pulse has the correct width, and all frequency
changes are synchronous, ensuring that no pulse is
smaller than 45% of the shortest period.
The duty cycle is within 45 and 55% in stable state, the rise
and fall times are less than 8% of the period and
precaution has been taken so that there is no overshoot or
undershoot.
Activation sequence
Figure 4 shows the activation sequence. When the card is
inactive, V
low-impedance with respect to ground. The DC-to-DC
converter is stopped. SIMI/O is pulled HIGH at V
20 k pull-up resistor. When all conditions are met (supply
voltage, card present, no hardware problems), the
microcontroller may initiate an activation sequence by
setting bit START to logic 1 (t
1. The DC-to-DC converter is started (t
2. V
3. I/O buffer is enabled in reception mode (t
4. CLK is sent to the card reader with RST = LOW, and
5. If a start bit is detected on I/O, the clock counter is
2000 Apr 20
2
f
I
SIMCLK
2
3 V/5 VN control bit with a controlled rise time of
0.17 V/ s typically (t
the count of 45000 (44745 for C2) CLK pulses is
started (t
stopped with RST = LOW. If not, RST = HIGH, and a
new count of 45000 (44745 for C2) CLK pulses is
started (t
C-bus SIM card interface
CC
starts rising from 0 to 3 or to 5 V according to
or
CC
1
, CLK, RST and I/O are LOW, with
4
5
4
1
).
= t
f
2
SIMCLK
f
osc
act
).
(1.25 MHz) with bits CLKPD1 and
depending on bit DT/DFN.
CLK
2
).
may be chosen to be
0
) via the I
2
1
C-bus:
).
3
).
DDI
via the
10
If a start bit is detected on I/O and the clock counter is
stopped with RST = HIGH, the card session may continue.
If not, bit MUTE is set in the status register and SIMERR is
pulled LOW. The microcontroller may initiate a
deactivation sequence by setting bit START to logic 0.
If a start bit is detected during the 200 first CLK pulses of
each count slot, then it will not be taken into account. If a
start bit is detected during 200 and 352 CLK pulses of
each slot, then bit EARLY is set in the status register and
SIMERR is pulled LOW. The microcontroller may initiate a
deactivation sequence by setting bit START to logic 0.
The sequencer is clocked by
interval T of 25 s typically. Thus t
t
the SIMCLK frequency.
Deactivation sequence
Figure 5 shows the deactivation sequence. When the
session is completed, the microcontroller sets bit START
to logic 0. The circuit will execute an automatic
deactivation sequence:
1. Card reset, RST falls to LOW (t
2. CLK is stopped (t
3. I/O falls to LOW (t
4. V
5. The DC-to-DC converter is stopped and CLK, RST,
Where t
t
2
13
= t
= t
The deactivation is completed when V
0.4 V (t
V
PGND (t
1
CC
CC
12
+
10
+ 5 s and t
3
falls to 0 V with typically 0.17 V/ s slew rate (t
and I/O become low-impedance with respect to
2
<
T; t
de
1
14
).
64
3
).
= t
T; t
1
11
+
14
11
= t
7
12
= t
2
).
T; t
).
10
10
+
4
+ 4T.
1
= t
1
2
64
T; t
1
f
+ 4T and t
osc
12
1
10
= 0 to
which leads to a time
= t
TDA8003TS
Product specification
).
10
+ T;
CC
1
5
64
depends on
reaches
T;
13
).