PCF88332DA PHILIPS [NXP Semiconductors], PCF88332DA Datasheet - Page 18
PCF88332DA
Manufacturer Part Number
PCF88332DA
Description
STN RGB - 132 X 132 X 3 driver
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.PCF88332DA.pdf
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Philips Semiconductors
6.2.7
The Read Display Status (RDDST) command returns a
32-bit display status information and can be accessed
when the PCF8833 is in normal Display mode (see
Section 6.2.11), in partial Display mode (see
Section 6.2.23) or in Sleep_IN mode; see Section 6.2.8.
The input and output data format is as follows: After the
command byte 09H is sent, the read starts with one
dummy clock cycle followed by the 4 status bytes (see
Fig.48).
Table 12 Read display status register bits
Table 13 RDDST data format for Serial mode
Table 14 RDDST data format for Parallel mode
2003 Feb 14
(S)DIN
(S)DOUT
(S)DOUT
STN RGB - 132
D/C
D/C
BIT
0
0
1
1
1
1
1
R
EAD DISPLAY STATUS
D/C
D31
D15
0
X
7
0
7
0
0
0
D31
D15
7
0
0
0
D30
D22
X
6
0
6
0
0
0
132
D30
D22
6
0
0
0
3 driver
D29
D21
D13
X
5
0
5
0
0
X (only one dummy clock cycle, not a full byte)
D29
D21
D13
5
0
0
D28
D20
D12
X
4
0
4
0
0
D28
D20
D12
18
4
0
0
When less than 33 read clock cycles are sent in Serial
mode the status read must be interrupted by a hardware
reset or a rising edge of SCE.
The definition of the display status bits is given in Table 11.
D27
D19
D11
X
3
1
3
1
0
D27
D19
D11
3
1
0
D26
D18
D10
X
2
0
2
0
0
D26
D18
D10
2
0
0
D17
D9
1
0
1
0
X
0
0
D17
D9
1
0
0
0
Objective specification
D16
D16
X
0
1
0
1
0
0
0
0
1
0
0
0
PCF8833
DEFAULT
DEFAULT
DEFAULT
09H
09H
09H
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
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